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AJvYcCWNcEHxNJLX2mJg344qUXTka1nzEr7cL3m8yiCtvulz7N+4JVYp2tL2wt17wtbK83ZNDVubNxnzb9nhwLAoHTXjOPFddZsZ5mkgqzh1 X-Gm-Message-State: AOJu0Yz8fPjYFkAstONM3zW5cV8qTEIDGdxsBVmT+3HLjkQ98LOTKRkX xPXu/IIB/+zRUFF1EyIPlKVOJzEzsuu54E3F+BjcsupwDUY5cI97shwvRoRiaV2htrVDCY1Pd+/ nDhBDHsjKnF8Rg6fSdII1MmYVKoAxqP/wC6JD2g== X-Received: by 2002:a05:6870:788c:b0:22a:107c:4dd6 with SMTP id hc12-20020a056870788c00b0022a107c4dd6mr3948186oab.40.1711520646891; Tue, 26 Mar 2024 23:24:06 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240327045035.368512-1-samuel.holland@sifive.com> <20240327045035.368512-7-samuel.holland@sifive.com> In-Reply-To: <20240327045035.368512-7-samuel.holland@sifive.com> From: yunhui cui Date: Wed, 27 Mar 2024 14:23:56 +0800 Message-ID: Subject: Re: [External] [PATCH v6 06/13] riscv: mm: Combine the SMP and UP TLB flush code To: Samuel Holland Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexandre Ghiti , Jisheng Zhang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Samuel, On Wed, Mar 27, 2024 at 12:51=E2=80=AFPM Samuel Holland wrote: > > In SMP configurations, all TLB flushing narrower than flush_tlb_all() > goes through __flush_tlb_range(). Do the same in UP configurations. > > This allows UP configurations to take advantage of recent improvements > to the code in tlbflush.c, such as support for huge pages and flushing > multiple-page ranges. > > Reviewed-by: Alexandre Ghiti > Signed-off-by: Samuel Holland > --- > > (no changes since v4) > > Changes in v4: > - Merge the two copies of __flush_tlb_range() and rely on the compiler > to optimize out the broadcast path (both clang and gcc do this) > - Merge the two copies of flush_tlb_all() and rely on constant folding > > Changes in v2: > - Move the SMP/UP merge earlier in the series to avoid build issues > - Make a copy of __flush_tlb_range() instead of adding ifdefs inside > - local_flush_tlb_all() is the only function used on !MMU (smpboot.c) > > arch/riscv/Kconfig | 2 +- > arch/riscv/include/asm/tlbflush.h | 31 +++---------------------------- > arch/riscv/mm/Makefile | 5 +---- > 3 files changed, 5 insertions(+), 33 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index be09c8836d56..442532819a44 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -60,7 +60,7 @@ config RISCV > select ARCH_USE_MEMTEST > select ARCH_USE_QUEUED_RWLOCKS > select ARCH_USES_CFI_TRAPS if CFI_CLANG > - select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if SMP && MMU > + select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU > select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU > select ARCH_WANT_FRAME_POINTERS > select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT > diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/t= lbflush.h > index 4112cc8d1d69..4f86424b1ba5 100644 > --- a/arch/riscv/include/asm/tlbflush.h > +++ b/arch/riscv/include/asm/tlbflush.h > @@ -27,12 +27,7 @@ static inline void local_flush_tlb_page(unsigned long = addr) > { > ALT_FLUSH_TLB_PAGE(__asm__ __volatile__ ("sfence.vma %0" : : "r" = (addr) : "memory")); > } > -#else /* CONFIG_MMU */ > -#define local_flush_tlb_all() do { } while (0) > -#define local_flush_tlb_page(addr) do { } while (0) > -#endif /* CONFIG_MMU */ > > -#if defined(CONFIG_SMP) && defined(CONFIG_MMU) > void flush_tlb_all(void); > void flush_tlb_mm(struct mm_struct *mm); > void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, > @@ -54,28 +49,8 @@ void arch_tlbbatch_add_pending(struct arch_tlbflush_un= map_batch *batch, > unsigned long uaddr); > void arch_flush_tlb_batched_pending(struct mm_struct *mm); > void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); > - > -#else /* CONFIG_SMP && CONFIG_MMU */ > - > -#define flush_tlb_all() local_flush_tlb_all() > -#define flush_tlb_page(vma, addr) local_flush_tlb_page(addr) > - > -static inline void flush_tlb_range(struct vm_area_struct *vma, > - unsigned long start, unsigned long end) > -{ > - local_flush_tlb_all(); > -} > - > -/* Flush a range of kernel pages */ > -static inline void flush_tlb_kernel_range(unsigned long start, > - unsigned long end) > -{ > - local_flush_tlb_all(); > -} > - > -#define flush_tlb_mm(mm) flush_tlb_all() > -#define flush_tlb_mm_range(mm, start, end, page_size) flush_tlb_all() > -#define local_flush_tlb_kernel_range(start, end) flush_tlb_all() > -#endif /* !CONFIG_SMP || !CONFIG_MMU */ > +#else /* CONFIG_MMU */ > +#define local_flush_tlb_all() do { } while (0) > +#endif /* CONFIG_MMU */ > > #endif /* _ASM_RISCV_TLBFLUSH_H */ > diff --git a/arch/riscv/mm/Makefile b/arch/riscv/mm/Makefile > index 2c869f8026a8..cbe4d775ef56 100644 > --- a/arch/riscv/mm/Makefile > +++ b/arch/riscv/mm/Makefile > @@ -13,14 +13,11 @@ endif > KCOV_INSTRUMENT_init.o :=3D n > > obj-y +=3D init.o > -obj-$(CONFIG_MMU) +=3D extable.o fault.o pageattr.o pgtable.o > +obj-$(CONFIG_MMU) +=3D extable.o fault.o pageattr.o pgtable.o tlbflush.o > obj-y +=3D cacheflush.o > obj-y +=3D context.o > obj-y +=3D pmem.o > > -ifeq ($(CONFIG_MMU),y) > -obj-$(CONFIG_SMP) +=3D tlbflush.o > -endif > obj-$(CONFIG_HUGETLB_PAGE) +=3D hugetlbpage.o > obj-$(CONFIG_PTDUMP_CORE) +=3D ptdump.o > obj-$(CONFIG_KASAN) +=3D kasan_init.o > -- > 2.43.1 > This is cleaner than my previous modification to support UP __flush_tlb_ran= ge. So: Reviewed-by: Yunhui Cui Thanks, Yunhui