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Wed, 27 Mar 2024 00:18:38 -0700 Received: from IPBU-BLR-SERVER1.marvell.com (IPBU-BLR-SERVER1.marvell.com [10.28.8.41]) by maili.marvell.com (Postfix) with ESMTP id 787483F70C1; Wed, 27 Mar 2024 00:18:35 -0700 (PDT) From: Gowthami Thiagarajan To: , , , CC: , , , Gowthami Thiagarajan Subject: [RESEND PATCH v4 0/3] Marvell Odyssey uncore performance monitor support Date: Wed, 27 Mar 2024 12:48:29 +0530 Message-ID: <20240327071832.1556576-1-gthiagarajan@marvell.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: Lhez1xrU4spcFW7Mhthlajdpf-ZEY62S X-Proofpoint-ORIG-GUID: Lhez1xrU4spcFW7Mhthlajdpf-ZEY62S X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-27_04,2024-03-21_02,2023-05-22_02 Odyssey is a 64 bit ARM based SoC with multiple performance monitor units for various blocks. This series of patches introduces support for uncore performance monitor units (PMUs) on the Marvell Odyssey platform. The PMUs covered in this series include the DDR PMU and LLC-TAD PMU. v3->v4: - Refactored the existing ddr pmu driver to extract the platform data Gowthami Thiagarajan (3): perf/marvell: Refactor to extract platform data - no functional change perf/marvell: perf/marvell: Odyssey DDR Performance monitor support perf/marvell : Odyssey LLC-TAD performance monitor support drivers/perf/marvell_cn10k_ddr_pmu.c | 528 +++++++++++++++++++++++---- drivers/perf/marvell_cn10k_tad_pmu.c | 62 +++- 2 files changed, 515 insertions(+), 75 deletions(-) -- 2.25.1