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[95.247.253.192]) by smtp.gmail.com with ESMTPSA id v16-20020a5d5910000000b003418364032asm15087444wrd.112.2024.03.27.07.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 07:41:50 -0700 (PDT) Message-ID: <6604302e.5d0a0220.bdb64.4077@mx.google.com> X-Google-Original-Message-ID: Date: Wed, 27 Mar 2024 15:41:47 +0100 From: Christian Marangi To: Manivannan Sadhasivam Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Md Sadre Alam , Sricharan Ramabadhran , linux-mtd@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v2 1/2] mtd: rawnand: qcom: Fix broken erase in misc_cmd_type in exec_op References: <20240325103053.24408-1-ansuelsmth@gmail.com> <20240326072512.GA8436@thinkpad> <20240326073947.GA9565@thinkpad> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240326073947.GA9565@thinkpad> On Tue, Mar 26, 2024 at 01:09:47PM +0530, Manivannan Sadhasivam wrote: > On Tue, Mar 26, 2024 at 12:55:19PM +0530, Manivannan Sadhasivam wrote: > > On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote: > > > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409 > > > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was > > > reworked and generalized but actually broke the handling of the > > > ERASE_BLOCK command. > > > > > > Additional logic was added to the erase command cycle without clear > > > explaination causing the erase command to be broken on testing it on > > > a ipq806x nandc. > > > > > > Fix the erase command by reverting the additional logic and only adding > > > the NAND_DEV0_CFG0 additional call (required for erase command). > > > > > > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") > > > Cc: stable@vger.kernel.org > > > Signed-off-by: Christian Marangi > > > --- > > > Changes v2: > > > - Split this and rework commit description and title > > > > > > drivers/mtd/nand/raw/qcom_nandc.c | 5 ++--- > > > 1 file changed, 2 insertions(+), 3 deletions(-) > > > > > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c > > > index b079605c84d3..19d76e345a49 100644 > > > --- a/drivers/mtd/nand/raw/qcom_nandc.c > > > +++ b/drivers/mtd/nand/raw/qcom_nandc.c > > > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub > > > nandc_set_reg(chip, NAND_EXEC_CMD, 1); > > > > > > write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL); > > > - (q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0, > > > - 2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc, > > > - NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL); > > > + if (q_op.cmd_reg == OP_BLOCK_ERASE) > > > + write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL); > > > > So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1, > > NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg == > > OP_BLOCK_ERASE, the result is the same. > > > > I'm wondering how it results in fixing the OP_BLOCK_ERASE command. > > > > Perhaps you are trying to fix the OP_RESET_DEVICE command altogether? > Well with this only patch correct working of nandc on ipq806x is restored. I'm still very confused how since the misc command currently works only with the PROGRAM_PAGE and the BLOCK_ERASE (from ERASE1 and ERASE2) Still the extra read was added with no explaination and I couldn't find this command cycle in any of the previous legacy function and the one introduced after the parser rework. -- Ansuel