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AJvYcCUrdVkIsAVf4XoBPKUDzUW4QrWsA9hMYDBRiI0pF6yZ7GitHZW7o1e3wTGsC1cJsOWKU6S45v7p9ZpbI/qg6D02CLpmHtlSvS+hMTqJxLVKiNI+FGoJ5v5gwbl3wC4G+KUbAdSw/MUieynDhnyDdtXMjl9jIO1R805Z6NfFgKrL9qp5NP8NKKwh X-Gm-Message-State: AOJu0YxTe3Rup9plxdlWsvSEBXB1Ky1YFFUe3Ey75Ob7Pspf8g6eStbB 5CaytFRjNS5IJCAXN+NyIMUm/vUu4R0732YFhBKAX2uUErI0B5BOSuSM6GyMU7wlJsYtlbZVp0y JDdTHe4Bjuep3f7JjkVzYPwKQFZw= X-Received: by 2002:a05:600c:1c01:b0:413:ff06:83cd with SMTP id j1-20020a05600c1c0100b00413ff0683cdmr344618wms.3.1711555668321; Wed, 27 Mar 2024 09:07:48 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240327085330.3281697-1-peteryin.openbmc@gmail.com> <20240327085330.3281697-5-peteryin.openbmc@gmail.com> In-Reply-To: From: Chia Hsing Yin Date: Thu, 28 Mar 2024 00:07:37 +0800 Message-ID: Subject: Re: [PATCH v4 4/4] drivers: watchdog: ast2500 and ast2600 support bootstatus To: Guenter Roeck Cc: patrick@stwcx.xyz, Wim Van Sebroeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Mar 27, 2024 at 11:47=E2=80=AFPM Guenter Roeck = wrote: > > On 3/27/24 01:53, Peter Yin wrote: > > Add WDIOF_EXTERN1 and WDIOF_CARDRESET bootstatus in ast2600 > > > > Regarding the AST2600 specification, the WDTn Timeout Status Register > > (WDT10) has bit 1 reserved. Bit 1 of the status register indicates > > on ast2500 if the boot was from the second boot source. > > It does not indicate that the most recent reset was triggered by > > the watchdog. The code should just be changed to set WDIOF_CARDRESET > > if bit 0 of the status register is set. > > > > Include SCU register to veriy WDIOF_EXTERN1 in ast2600 SCU74 or > > ast2500 SCU3C when bit1 is set. > > > > Signed-off-by: Peter Yin > > --- > > drivers/watchdog/aspeed_wdt.c | 60 +++++++++++++++++++++++++---------= - > > 1 file changed, 44 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wd= t.c > > index b4773a6aaf8c..29e9afdee619 100644 > > --- a/drivers/watchdog/aspeed_wdt.c > > +++ b/drivers/watchdog/aspeed_wdt.c > > @@ -11,10 +11,12 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > #include > > #include > > +#include > > #include > > > > static bool nowayout =3D WATCHDOG_NOWAYOUT; > > @@ -65,23 +67,32 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table); > > #define WDT_RELOAD_VALUE 0x04 > > #define WDT_RESTART 0x08 > > #define WDT_CTRL 0x0C > > -#define WDT_CTRL_BOOT_SECONDARY BIT(7) > > -#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5) > > -#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5) > > -#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5) > > -#define WDT_CTRL_1MHZ_CLK BIT(4) > > -#define WDT_CTRL_WDT_EXT BIT(3) > > -#define WDT_CTRL_WDT_INTR BIT(2) > > -#define WDT_CTRL_RESET_SYSTEM BIT(1) > > -#define WDT_CTRL_ENABLE BIT(0) > > +#define WDT_CTRL_BOOT_SECONDARY BIT(7) > > +#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5) > > +#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5) > > +#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5) > > +#define WDT_CTRL_1MHZ_CLK BIT(4) > > +#define WDT_CTRL_WDT_EXT BIT(3) > > +#define WDT_CTRL_WDT_INTR BIT(2) > > +#define WDT_CTRL_RESET_SYSTEM BIT(1) > > +#define WDT_CTRL_ENABLE BIT(0) > > #define WDT_TIMEOUT_STATUS 0x10 > > -#define WDT_TIMEOUT_STATUS_IRQ BIT(2) > > -#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1) > > +#define WDT_TIMEOUT_STATUS_IRQ BIT(2) > > +#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1) > > +#define WDT_TIMEOUT_STATUS_EVENT BIT(0) > > #define WDT_CLEAR_TIMEOUT_STATUS 0x14 > > -#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0) > > +#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0) > > #define WDT_RESET_MASK1 0x1c > > #define WDT_RESET_MASK2 0x20 > > > > The above bit value defines were indented to show what is > registers and what is register bit values. Why are you > changing that other than for personal preference ? > > Guenter > Oh! I'm sorry, I didn't realize this was a rule. I thought it was just an alignment issue. I will revert it in the next version. Thank you for explaining.