Received-SPF: pass (google.com: domain of linux-kernel+bounces-122198-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161;
Date: Wed, 27 Mar 2024 16:50:54 -0700
From: Isaku Yamahata <isaku.yamahata@intel.com>
To: Binbin Wu <binbin.wu@linux.intel.com>
Cc: Chenyi Qiang <chenyi.qiang@intel.com>, isaku.yamahata@intel.com,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	isaku.yamahata@gmail.com, Paolo Bonzini <pbonzini@redhat.com>,
	erdemaktas@google.com, Sean Christopherson <seanjc@google.com>,
	Sagi Shahar <sagis@google.com>, Kai Huang <kai.huang@intel.com>,
	chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
	isaku.yamahata@linux.intel.com
Subject: Re: [PATCH v19 046/130] KVM: x86/mmu: Add address conversion
 functions for TDX shared bit of GPA
Message-ID: <20240327235054.GH2444378@ls.amr.corp.intel.com>
References: <cover.1708933498.git.isaku.yamahata@intel.com>
 <973a3e06111fe84f2b1e971636cbaa3facf7b120.1708933498.git.isaku.yamahata@intel.com>
 <b07d0749-8a72-4a0a-a0ad-808d7ea2b922@intel.com>
 <6052c6cd-635e-483a-90e2-d66beb1bb91b@linux.intel.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline
In-Reply-To: <6052c6cd-635e-483a-90e2-d66beb1bb91b@linux.intel.com>

On Wed, Mar 27, 2024 at 10:09:21PM +0800,
Binbin Wu <binbin.wu@linux.intel.com> wrote:

> 
> 
> On 3/27/2024 11:08 AM, Chenyi Qiang wrote:
> > 
> > On 2/26/2024 4:25 PM, isaku.yamahata@intel.com wrote:
> > > From: Isaku Yamahata <isaku.yamahata@intel.com>
> > > 
> > > TDX repurposes one GPA bit (51 bit or 47 bit based on configuration) to
> > > indicate the GPA is private(if cleared) or shared (if set) with VMM.  If
> > > GPA.shared is set, GPA is covered by the existing conventional EPT pointed
> > > by EPTP.  If GPA.shared bit is cleared, GPA is covered by TDX module.
> > > VMM has to issue SEAMCALLs to operate.
> > > 
> > > Add a member to remember GPA shared bit for each guest TDs, add address
> > > conversion functions between private GPA and shared GPA and test if GPA
> > > is private.
> > > 
> > > Because struct kvm_arch (or struct kvm which includes struct kvm_arch. See
> > > kvm_arch_alloc_vm() that passes __GPF_ZERO) is zero-cleared when allocated,
> > > the new member to remember GPA shared bit is guaranteed to be zero with
> > > this patch unless it's initialized explicitly.
> > > 
> > > 			default or SEV-SNP	TDX: S = (47 or 51) - 12
> > > gfn_shared_mask		0			S bit
> > > kvm_is_private_gpa()	always false		true if GFN has S bit set
> > TDX: true if GFN has S bit clear?
> > 
> > > kvm_gfn_to_shared()	nop			set S bit
> > > kvm_gfn_to_private()	nop			clear S bit
> > > 
> > > fault.is_private means that host page should be gotten from guest_memfd
> > > is_private_gpa() means that KVM MMU should invoke private MMU hooks.
> > > 
> > > Co-developed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
> > > Signed-off-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
> > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> > > Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com>
> > > ---
> > > v19:
> > > - Add comment on default vm case.
> > > - Added behavior table in the commit message
> > > - drop CONFIG_KVM_MMU_PRIVATE
> > > 
> > > v18:
> > > - Added Reviewed-by Binbin
> > > 
> > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> > > ---
> > >   arch/x86/include/asm/kvm_host.h |  2 ++
> > >   arch/x86/kvm/mmu.h              | 33 +++++++++++++++++++++++++++++++++
> > >   arch/x86/kvm/vmx/tdx.c          |  5 +++++
> > >   3 files changed, 40 insertions(+)
> > > 
> > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> > > index 5da3c211955d..de6dd42d226f 100644
> > > --- a/arch/x86/include/asm/kvm_host.h
> > > +++ b/arch/x86/include/asm/kvm_host.h
> > > @@ -1505,6 +1505,8 @@ struct kvm_arch {
> > >   	 */
> > >   #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
> > >   	struct kvm_mmu_memory_cache split_desc_cache;
> > > +
> > > +	gfn_t gfn_shared_mask;
> > >   };
> > >   struct kvm_vm_stat {
> > > diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
> > > index d96c93a25b3b..395b55684cb9 100644
> > > --- a/arch/x86/kvm/mmu.h
> > > +++ b/arch/x86/kvm/mmu.h
> > > @@ -322,4 +322,37 @@ static inline gpa_t kvm_translate_gpa(struct kvm_vcpu *vcpu,
> > >   		return gpa;
> > >   	return translate_nested_gpa(vcpu, gpa, access, exception);
> > >   }
> > > +
> > > +/*
> > > + *			default or SEV-SNP	TDX: where S = (47 or 51) - 12
> > > + * gfn_shared_mask	0			S bit
> > > + * is_private_gpa()	always false		if GPA has S bit set
> 
> Also here,
> TDX: true if GFN has S bit cleared

Oops. Will fix both.
-- 
Isaku Yamahata <isaku.yamahata@intel.com>