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AJvYcCWQiayn0xwFk+i3zxTbC+T2b6NKdSe9/XBHign5X65ae9vXBNk9g9JoJs7HNY30qIUW4a1DtHxqqJ+UB5ZtoYW5HE41UTNR4zCiu9DZ X-Gm-Message-State: AOJu0Yys+LX3oNu5AeBf7HYZg+PCndpWD/Uc8F511jaLmnZ1eUAWeGNz GEhqxG6SEmHz8OMDs/i5O34uhTOZDNKMvqI3WiibIH7+EcOtPvbaJSr2BVj9YApDx2bqQiwV6Wk Hy5neY/TuBHacpjtz/ZmHrcNMetJ3f17nL64OEQ== X-Received: by 2002:a05:6870:e97:b0:222:8961:43fa with SMTP id mm23-20020a0568700e9700b00222896143famr445494oab.15.1711592508022; Wed, 27 Mar 2024 19:21:48 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240327045035.368512-1-samuel.holland@sifive.com> <20240327045035.368512-6-samuel.holland@sifive.com> In-Reply-To: From: yunhui cui Date: Thu, 28 Mar 2024 10:21:37 +0800 Message-ID: Subject: Re: [External] [PATCH v6 05/13] riscv: Only send remote fences when some other CPU is online To: Samuel Holland Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexandre Ghiti , Jisheng Zhang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Samuel, On Thu, Mar 28, 2024 at 4:14=E2=80=AFAM Samuel Holland wrote: > > Hi Yunhui, > > On 2024-03-27 1:16 AM, yunhui cui wrote: > > On Wed, Mar 27, 2024 at 12:50=E2=80=AFPM Samuel Holland > > wrote: > >> > >> If no other CPU is online, a local cache or TLB flush is sufficient. > >> These checks can be constant-folded when SMP is disabled. > >> > >> Signed-off-by: Samuel Holland > >> --- > >> > >> (no changes since v4) > >> > >> Changes in v4: > >> - New patch for v4 > >> > >> arch/riscv/mm/cacheflush.c | 4 +++- > >> arch/riscv/mm/tlbflush.c | 4 +++- > >> 2 files changed, 6 insertions(+), 2 deletions(-) > >> > >> diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c > >> index d76fc73e594b..f5be1fec8191 100644 > >> --- a/arch/riscv/mm/cacheflush.c > >> +++ b/arch/riscv/mm/cacheflush.c > >> @@ -21,7 +21,9 @@ void flush_icache_all(void) > >> { > >> local_flush_icache_all(); > >> > >> - if (riscv_use_sbi_for_rfence()) > >> + if (num_online_cpus() < 2) > >> + return; > >> + else if (riscv_use_sbi_for_rfence()) > >> sbi_remote_fence_i(NULL); > >> else > >> on_each_cpu(ipi_remote_fence_i, NULL, 1); > >> diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c > >> index da821315d43e..0901aa47b58f 100644 > >> --- a/arch/riscv/mm/tlbflush.c > >> +++ b/arch/riscv/mm/tlbflush.c > >> @@ -79,7 +79,9 @@ static void __ipi_flush_tlb_all(void *info) > >> > >> void flush_tlb_all(void) > >> { > >> - if (riscv_use_sbi_for_rfence()) > >> + if (num_online_cpus() < 2) > >> + local_flush_tlb_all(); > >> + else if (riscv_use_sbi_for_rfence()) > >> sbi_remote_sfence_vma_asid(NULL, 0, FLUSH_TLB_MAX_SIZE= , FLUSH_TLB_NO_ASID); > >> else > >> on_each_cpu(__ipi_flush_tlb_all, NULL, 1); > >> -- > >> 2.43.1 > >> > > > > From a perceptual point of view, the modification here is not > > necessary. There is such logic in on_each_cpu(). Can you share your > > test data? > > The logic in on_each_cpu() doesn't apply when riscv_use_sbi_for_rfence() = is > true, so we would make unnecessary SBI calls, and cannot be oppimized out= when > CONFIG_SMP=3Dn. Is it possible to do this: "sbi_remote_sfence_vma_asid(cpu_online_mask,...); " instead of adding: "if (num_online_cpus() < 2)" ? Thanks, Yunhui