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AJvYcCVflLciQ+vLo4GomigLwWI1oojED752YQ5ywiWhEWPZdIpdy/0lmCBrl0JHwQayPHVaDw+TsQaRoS4/y69bt5L1APaUZ9vXk+e4d447 X-Gm-Message-State: AOJu0Yw8y7D/AQNTzm+CXMOnZnL4ZrZPHOINEGJPyvx/RzOCo4Br2s/Q 2w5fbw/++9AfnrGEOECWXEqzw3QSmSTz4x3dVrtMQE2/I1ax3IT/P2XU7w9s1uNSAQJBJho3P7/ HHR3GI0w8nR9JCBvHikW2phh38jg= X-Received: by 2002:a05:6a20:5498:b0:1a5:6a16:f6c3 with SMTP id i24-20020a056a20549800b001a56a16f6c3mr1663466pzk.38.1711595336575; Wed, 27 Mar 2024 20:08:56 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240326173142.2324624-1-sunil.khatri@amd.com> In-Reply-To: <20240326173142.2324624-1-sunil.khatri@amd.com> From: Alex Deucher Date: Wed, 27 Mar 2024 23:08:44 -0400 Message-ID: Subject: Re: [PATCH] drm/amdgpu: add IP's FW information to devcoredump To: Sunil Khatri Cc: Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= , Shashank Sharma , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Hawking Zhang , Felix Kuehling , Lijo Lazar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Mar 26, 2024 at 1:31=E2=80=AFPM Sunil Khatri = wrote: > > Add FW information of all the IP's in the devcoredump. > > Signed-off-by: Sunil Khatri Might want to include the vbios version info as well, e.g., atom_context->name atom_context->vbios_pn atom_context->vbios_ver_str atom_context->date Either way, Reviewed-by: Alex Deucher > --- > .../gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c | 122 ++++++++++++++++++ > 1 file changed, 122 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c b/drivers/g= pu/drm/amd/amdgpu/amdgpu_dev_coredump.c > index 44c5da8aa9ce..d598b6520ec9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c > @@ -69,6 +69,124 @@ const char *hw_ip_names[MAX_HWIP] =3D { > [PCIE_HWIP] =3D "PCIE", > }; > > +static void amdgpu_devcoredump_fw_info(struct amdgpu_device *adev, > + struct drm_printer *p) > +{ > + uint32_t version; > + uint32_t feature; > + uint8_t smu_program, smu_major, smu_minor, smu_debug; > + > + drm_printf(p, "VCE feature version: %u, fw version: 0x%08x\n", > + adev->vce.fb_version, adev->vce.fw_version); > + drm_printf(p, "UVD feature version: %u, fw version: 0x%08x\n", 0, > + adev->uvd.fw_version); > + drm_printf(p, "GMC feature version: %u, fw version: 0x%08x\n", 0, > + adev->gmc.fw_version); > + drm_printf(p, "ME feature version: %u, fw version: 0x%08x\n", > + adev->gfx.me_feature_version, adev->gfx.me_fw_version)= ; > + drm_printf(p, "PFP feature version: %u, fw version: 0x%08x\n", > + adev->gfx.pfp_feature_version, adev->gfx.pfp_fw_versio= n); > + drm_printf(p, "CE feature version: %u, fw version: 0x%08x\n", > + adev->gfx.ce_feature_version, adev->gfx.ce_fw_version)= ; > + drm_printf(p, "RLC feature version: %u, fw version: 0x%08x\n", > + adev->gfx.rlc_feature_version, adev->gfx.rlc_fw_versio= n); > + > + drm_printf(p, "RLC SRLC feature version: %u, fw version: 0x%08x\n= ", > + adev->gfx.rlc_srlc_feature_version, > + adev->gfx.rlc_srlc_fw_version); > + drm_printf(p, "RLC SRLG feature version: %u, fw version: 0x%08x\n= ", > + adev->gfx.rlc_srlg_feature_version, > + adev->gfx.rlc_srlg_fw_version); > + drm_printf(p, "RLC SRLS feature version: %u, fw version: 0x%08x\n= ", > + adev->gfx.rlc_srls_feature_version, > + adev->gfx.rlc_srls_fw_version); > + drm_printf(p, "RLCP feature version: %u, fw version: 0x%08x\n", > + adev->gfx.rlcp_ucode_feature_version, > + adev->gfx.rlcp_ucode_version); > + drm_printf(p, "RLCV feature version: %u, fw version: 0x%08x\n", > + adev->gfx.rlcv_ucode_feature_version, > + adev->gfx.rlcv_ucode_version); > + drm_printf(p, "MEC feature version: %u, fw version: 0x%08x\n", > + adev->gfx.mec_feature_version, adev->gfx.mec_fw_versio= n); > + > + if (adev->gfx.mec2_fw) > + drm_printf(p, "MEC2 feature version: %u, fw version: 0x%0= 8x\n", > + adev->gfx.mec2_feature_version, > + adev->gfx.mec2_fw_version); > + > + drm_printf(p, "IMU feature version: %u, fw version: 0x%08x\n", 0, > + adev->gfx.imu_fw_version); > + drm_printf(p, "PSP SOS feature version: %u, fw version: 0x%08x\n"= , > + adev->psp.sos.feature_version, adev->psp.sos.fw_versio= n); > + drm_printf(p, "PSP ASD feature version: %u, fw version: 0x%08x\n"= , > + adev->psp.asd_context.bin_desc.feature_version, > + adev->psp.asd_context.bin_desc.fw_version); > + > + drm_printf(p, "TA XGMI feature version: 0x%08x, fw version: 0x%08= x\n", > + adev->psp.xgmi_context.context.bin_desc.feature_versio= n, > + adev->psp.xgmi_context.context.bin_desc.fw_version); > + drm_printf(p, "TA RAS feature version: 0x%08x, fw version: 0x%08x= \n", > + adev->psp.ras_context.context.bin_desc.feature_version= , > + adev->psp.ras_context.context.bin_desc.fw_version); > + drm_printf(p, "TA HDCP feature version: 0x%08x, fw version: 0x%08= x\n", > + adev->psp.hdcp_context.context.bin_desc.feature_versio= n, > + adev->psp.hdcp_context.context.bin_desc.fw_version); > + drm_printf(p, "TA DTM feature version: 0x%08x, fw version: 0x%08x= \n", > + adev->psp.dtm_context.context.bin_desc.feature_version= , > + adev->psp.dtm_context.context.bin_desc.fw_version); > + drm_printf(p, "TA RAP feature version: 0x%08x, fw version: 0x%08x= \n", > + adev->psp.rap_context.context.bin_desc.feature_version= , > + adev->psp.rap_context.context.bin_desc.fw_version); > + drm_printf( > + p, > + "TA SECURE DISPLAY feature version: 0x%08x, fw version: 0= x%08x\n", > + adev->psp.securedisplay_context.context.bin_desc.feature_= version, > + adev->psp.securedisplay_context.context.bin_desc.fw_versi= on); > + > + /* SMC firmware */ > + version =3D adev->pm.fw_version; > + > + smu_program =3D (version >> 24) & 0xff; > + smu_major =3D (version >> 16) & 0xff; > + smu_minor =3D (version >> 8) & 0xff; > + smu_debug =3D (version >> 0) & 0xff; > + drm_printf(p, > + "SMC feature version: %u, program: %d, fw version: 0x%= 08x (%d.%d.%d)\n", > + 0, smu_program, version, smu_major, smu_minor, smu_deb= ug); > + > + /* SDMA firmware */ > + for (int i =3D 0; i < adev->sdma.num_instances; i++) { > + drm_printf(p, > + "SDMA%d feature version: %u, firmware version:= 0x%08x\n", > + i, adev->sdma.instance[i].feature_version, > + adev->sdma.instance[i].fw_version); > + } > + > + drm_printf(p, "VCN feature version: %u, fw version: 0x%08x\n", 0, > + adev->vcn.fw_version); > + drm_printf(p, "DMCU feature version: %u, fw version: 0x%08x\n", 0= , > + adev->dm.dmcu_fw_version); > + drm_printf(p, "DMCUB feature version: %u, fw version: 0x%08x\n", = 0, > + adev->dm.dmcub_fw_version); > + drm_printf(p, "PSP TOC feature version: %u, fw version: 0x%08x\n"= , > + adev->psp.toc.feature_version, adev->psp.toc.fw_versio= n); > + > + version =3D adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; > + feature =3D (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK= ) >> > + AMDGPU_MES_FEAT_VERSION_SHIFT; > + drm_printf(p, "MES_KIQ feature version: %u, fw version: 0x%08x\n"= , > + feature, version); > + > + version =3D adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; > + feature =3D (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MA= SK) >> > + AMDGPU_MES_FEAT_VERSION_SHIFT; > + drm_printf(p, "MES feature version: %u, fw version: 0x%08x\n", fe= ature, > + version); > + > + drm_printf(p, "VPE feature version: %u, fw version: 0x%08x\n", > + adev->vpe.feature_version, adev->vpe.fw_version); > +} > + > static ssize_t > amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count, > void *data, size_t datalen) > @@ -118,6 +236,10 @@ amdgpu_devcoredump_read(char *buffer, loff_t offset,= size_t count, > } > } > > + /* IP firmware information */ > + drm_printf(&p, "\nIP Firmwares\n"); > + amdgpu_devcoredump_fw_info(coredump->adev, &p); > + > if (coredump->ring) { > drm_printf(&p, "\nRing timed out details\n"); > drm_printf(&p, "IP Type: %d Ring Name: %s\n", > -- > 2.34.1 >