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Davis" , , , Subject: [PATCH] gpio: davinci: Fix potential buffer overflow Date: Thu, 28 Mar 2024 12:10:21 +0300 Message-ID: <20240328091021.18027-1-amishin@t-argos.ru> X-Mailer: git-send-email 2.30.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: ta-mail-02.ta.t-argos.ru (172.17.13.212) To ta-mail-02 (172.17.13.212) X-KSMG-Rule-ID: 1 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184460 [Mar 28 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: amishin@t-argos.ru X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 13 0.3.13 9d58e50253d512f89cb08f71c87c671a2d0a1bca, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2;t-argos.ru:7.1.1;mx1.t-argos.ru.ru:7.1.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1, FromAlignment: s X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean, bases: 2024/03/28 07:24:00 X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 1.1.2.30, bases: 2024/03/28 06:03:00 #24486213 X-KSMG-AntiVirus-Status: Clean, skipped In davinci_gpio_probe() accessing an element of array 'chips->regs' of size 5 and array 'offset_array' of size 5 can lead to a buffer overflow, since the index 'bank' can have an out of range value 63. Fix this bug by limiting top index value. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: c809e37a3b5a ("gpio: davinci: Allocate the correct amount of memory for controller") Signed-off-by: Aleksandr Mishin --- drivers/gpio/gpio-davinci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index bb499e362912..b65df1f2b83f 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -257,6 +257,9 @@ static int davinci_gpio_probe(struct platform_device *pdev) spin_lock_init(&chips->lock); nbank = DIV_ROUND_UP(ngpio, 32); + if (nbank > MAX_REGS_BANKS || nbank > 5) { + nbank = MAX_REGS_BANKS < 5 ? MAX_REGS_BANKS : 5; + } for (bank = 0; bank < nbank; bank++) chips->regs[bank] = gpio_base + offset_array[bank]; -- 2.30.2