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Thu, 28 Mar 2024 10:00:30 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 28 Mar 2024 03:00:25 -0700 Date: Thu, 28 Mar 2024 15:30:21 +0530 From: Varadarajan Narayanan To: Dmitry Baryshkov CC: , , , , , , , , , , , , , Subject: Re: [PATCH v4 2/3] clk: qcom: add IPQ9574 interconnect clocks support Message-ID: References: <20240327081850.2924870-1-quic_varada@quicinc.com> <20240327081850.2924870-3-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: mPntLGzbq1JEOFupbpa7dIGTRZFOS6Zp X-Proofpoint-ORIG-GUID: mPntLGzbq1JEOFupbpa7dIGTRZFOS6Zp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-28_09,2024-03-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=925 impostorscore=0 spamscore=0 bulkscore=0 mlxscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403210001 definitions=main-2403280067 On Wed, Mar 27, 2024 at 10:49:56AM +0200, Dmitry Baryshkov wrote: > On Wed, 27 Mar 2024 at 10:21, Varadarajan Narayanan > wrote: > > > > Unlike MSM platforms that manage NoC related clocks and scaling > > from RPM, IPQ SoCs dont involve RPM in managing NoC related > > clocks and there is no NoC scaling. > > > > However, there is a requirement to enable some NoC interface > > clocks for accessing the peripheral controllers present on > > these NoCs. Though exposing these as normal clocks would work, > > having a minimalistic interconnect driver to handle these clocks > > would make it consistent with other Qualcomm platforms resulting > > in common code paths. This is similar to msm8996-cbf's usage of > > icc-clk framework. > > > > Signed-off-by: Varadarajan Narayanan > > --- > > v4: Use clk_hw instead of indices > > Do icc register in qcom_cc_probe() call stream > > Add icc clock info to qcom_cc_desc structure > > v3: Use indexed identifiers here to avoid confusion > > Fix error messages and move to common.c > > v2: Move DTS to separate patch > > Update commit log > > Auto select CONFIG_INTERCONNECT & CONFIG_INTERCONNECT_CLK to fix build error > > --- > > drivers/clk/qcom/Kconfig | 2 ++ > > drivers/clk/qcom/common.c | 34 ++++++++++++++++++++- > > drivers/clk/qcom/common.h | 4 ++- > > drivers/clk/qcom/gcc-ipq9574.c | 54 ++++++++++++++++++++++++++++++++++ Have addressed the comments and posted v5. Kindly review. Thanks Varada