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Date: Thu, 28 Mar 2024 16:00:57 +0200
From: Pekka Paalanen <pekka.paalanen@collabora.com>
To: Louis Chauvet <louis.chauvet@bootlin.com>
Cc: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com>, Melissa Wen
 <melissa.srw@gmail.com>, =?UTF-8?B?TWHDrXJh?= Canal
 <mairacanal@riseup.net>, Haneen Mohammed <hamohammed.sa@gmail.com>, Daniel
 Vetter <daniel@ffwll.ch>, Maarten Lankhorst
 <maarten.lankhorst@linux.intel.com>, Maxime Ripard <mripard@kernel.org>,
 Thomas Zimmermann <tzimmermann@suse.de>, David Airlie <airlied@gmail.com>,
 arthurgrillo@riseup.net, Jonathan Corbet <corbet@lwn.net>,
 dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
 jeremie.dautheribes@bootlin.com, miquel.raynal@bootlin.com,
 thomas.petazzoni@bootlin.com, seanpaul@google.com, marcheu@google.com,
 nicolejadeyee@google.com
Subject: Re: [PATCH v5 16/16] drm/vkms: Add support for DRM_FORMAT_R*
Message-ID: <20240328160057.124b32c4.pekka.paalanen@collabora.com>
In-Reply-To: <20240313-yuv-v5-16-e610cbd03f52@bootlin.com>
References: <20240313-yuv-v5-0-e610cbd03f52@bootlin.com>
	<20240313-yuv-v5-16-e610cbd03f52@bootlin.com>
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On Wed, 13 Mar 2024 18:45:10 +0100
Louis Chauvet <louis.chauvet@bootlin.com> wrote:

> This add the support for:
> - R1/R2/R4/R8
>=20
> R1 format was tested with [1] and [2].
>=20
> [1]: https://lore.kernel.org/r/20240313-new_rotation-v2-0-6230fd5cae59@bo=
otlin.com
> [2]: https://lore.kernel.org/igt-dev/20240306-b4-kms_tests-v1-0-8fe451efd=
2ac@bootlin.com/
>=20
> Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com>
> ---
>  drivers/gpu/drm/vkms/vkms_formats.c | 100 ++++++++++++++++++++++++++++++=
++++++
>  drivers/gpu/drm/vkms/vkms_plane.c   |   6 ++-
>  2 files changed, 105 insertions(+), 1 deletion(-)
>=20
> diff --git a/drivers/gpu/drm/vkms/vkms_formats.c b/drivers/gpu/drm/vkms/v=
kms_formats.c
> index 863fc91d6d48..cbb2ec09564a 100644
> --- a/drivers/gpu/drm/vkms/vkms_formats.c
> +++ b/drivers/gpu/drm/vkms/vkms_formats.c
> @@ -201,6 +201,11 @@ static struct pixel_argb_u16 argb_u16_from_RGB565(co=
nst u16 *pixel)
>  	return out_pixel;
>  }
> =20
> +static struct pixel_argb_u16 argb_u16_from_gray8(u8 gray)
> +{
> +	return argb_u16_from_u8888(255, gray, gray, gray);
> +}
> +
>  VISIBLE_IF_KUNIT struct pixel_argb_u16 argb_u16_from_yuv888(u8 y, u8 cb,=
 u8 cr,
>  							    struct conversion_matrix *matrix)
>  {
> @@ -269,6 +274,89 @@ static void black_to_argb_u16(const struct vkms_plan=
e_state *plane, int x_start,
>  	}
>  }
> =20
> +static void Rx_read_line(const struct vkms_plane_state *plane, int x_sta=
rt,
> +			 int y_start, enum pixel_read_direction direction, int count,
> +			 struct pixel_argb_u16 out_pixel[], u8 bit_per_pixel, u8 lum_per_leve=
l)
> +{
> +	struct pixel_argb_u16 *end =3D out_pixel + count;
> +	u8 *src_pixels;
> +	int rem_x, rem_y;
> +
> +	packed_pixels_addr(plane->frame_info, x_start, y_start, 0, &src_pixels,=
 &rem_x, &rem_y);

Maybe assert that rem_y =3D 0? Or block_h =3D 1.

> +	int bit_offset =3D (int)rem_x * bit_per_pixel;

Why cast rem_x to int when it was defined to be int?

> +	int step =3D get_step_next_block(plane->frame_info->fb, direction, 0);
> +	int mask =3D (0x1 << bit_per_pixel) - 1;

Since mask will interact with u8, it should be unsigned too.

> +
> +	if (direction =3D=3D READ_LEFT_TO_RIGHT || direction =3D=3D READ_RIGHT_=
TO_LEFT) {
> +		int restart_bit_offset =3D 0;
> +		int step_bit_offset =3D bit_per_pixel;
> +
> +		if (direction =3D=3D READ_RIGHT_TO_LEFT) {
> +			restart_bit_offset =3D 8 - bit_per_pixel;
> +			step_bit_offset =3D -bit_per_pixel;
> +		}
> +
> +		while (out_pixel < end) {
> +			u8 val =3D (*src_pixels & (mask << bit_offset)) >> bit_offset;

or shorter: (*src_pixels >> bit_offset) & mask

However, shouldn't the first pixel be on the high bits?

That how I would understand the comments in drm_fourcc.h.

Again a reason to avoid a solid color fill in IGT.

> +
> +			*out_pixel =3D argb_u16_from_gray8(val * lum_per_level);
> +
> +			bit_offset +=3D step_bit_offset;
> +			if (bit_offset < 0 || 8 <=3D bit_offset) {
> +				bit_offset =3D restart_bit_offset;
> +				src_pixels +=3D step;
> +			}
> +			out_pixel +=3D 1;
> +		}
> +	} else if (direction =3D=3D READ_TOP_TO_BOTTOM || direction =3D=3D READ=
_BOTTOM_TO_TOP) {
> +		while (out_pixel < end) {
> +			u8 val =3D (*src_pixels & (mask << bit_offset)) >> bit_offset;
> +			*out_pixel =3D argb_u16_from_gray8(val * lum_per_level);
> +			src_pixels +=3D step;
> +			out_pixel +=3D 1;
> +		}
> +	}
> +}
> +
> +static void R1_read_line(const struct vkms_plane_state *plane, int x_sta=
rt,
> +			 int y_start, enum pixel_read_direction direction, int count,
> +			 struct pixel_argb_u16 out_pixel[])
> +{
> +	Rx_read_line(plane, x_start, y_start, direction, count, out_pixel, 1, 0=
xFF);
> +}
> +
> +static void R2_read_line(const struct vkms_plane_state *plane, int x_sta=
rt,
> +			 int y_start, enum pixel_read_direction direction, int count,
> +			 struct pixel_argb_u16 out_pixel[])
> +{
> +	Rx_read_line(plane, x_start, y_start, direction, count, out_pixel, 2, 0=
x55);
> +}
> +
> +static void R4_read_line(const struct vkms_plane_state *plane, int x_sta=
rt,
> +			 int y_start, enum pixel_read_direction direction, int count,
> +			 struct pixel_argb_u16 out_pixel[])
> +{
> +	Rx_read_line(plane, x_start, y_start, direction, count, out_pixel, 4, 0=
x11);
> +}
> +
> +static void R8_read_line(const struct vkms_plane_state *plane, int x_sta=
rt,
> +			 int y_start, enum pixel_read_direction direction, int count,
> +			 struct pixel_argb_u16 out_pixel[])
> +{
> +	struct pixel_argb_u16 *end =3D out_pixel + count;
> +	u8 *src_pixels;
> +	int rem_x, rem_y;
> +	int step =3D get_step_next_block(plane->frame_info->fb, direction, 0);
> +
> +	packed_pixels_addr(plane->frame_info, x_start, y_start, 0, &src_pixels,=
 &rem_x, &rem_y);

Assert on block size?


> +
> +	while (out_pixel < end) {
> +		*out_pixel =3D argb_u16_from_gray8(*src_pixels);
> +		src_pixels +=3D step;
> +		out_pixel +=3D 1;
> +	}
> +}
> +
>  static void ARGB8888_read_line(const struct vkms_plane_state *plane, int=
 x_start, int y_start,
>  			       enum pixel_read_direction direction, int count,
>  			       struct pixel_argb_u16 out_pixel[])
> @@ -582,6 +670,14 @@ pixel_read_line_t get_pixel_read_line_function(u32 f=
ormat)
>  	case DRM_FORMAT_YVU422:
>  	case DRM_FORMAT_YVU444:
>  		return &planar_yuv_read_line;
> +	case DRM_FORMAT_R1:
> +		return &R1_read_line;
> +	case DRM_FORMAT_R2:
> +		return &R2_read_line;
> +	case DRM_FORMAT_R4:
> +		return &R4_read_line;
> +	case DRM_FORMAT_R8:
> +		return &R8_read_line;
>  	default:
>  		/*
>  		 * This is a bug in vkms_plane_atomic_check. All the supported
> @@ -855,6 +951,10 @@ get_conversion_matrix_to_argb_u16(u32 format, enum d=
rm_color_encoding encoding,
>  	case DRM_FORMAT_ARGB16161616:
>  	case DRM_FORMAT_XRGB16161616:
>  	case DRM_FORMAT_RGB565:
> +	case DRM_FORMAT_R1:
> +	case DRM_FORMAT_R2:
> +	case DRM_FORMAT_R4:
> +	case DRM_FORMAT_R8:
>  		/*
>  		 * Those formats are supported, but they don't need a conversion matri=
x. Return

It is strange that you need to list irrelevant formats here.


>  		 * a valid pointer to avoid kernel panic in case this matrix is used/c=
hecked
> diff --git a/drivers/gpu/drm/vkms/vkms_plane.c b/drivers/gpu/drm/vkms/vkm=
s_plane.c
> index e21cc92cf497..dc9d62acf350 100644
> --- a/drivers/gpu/drm/vkms/vkms_plane.c
> +++ b/drivers/gpu/drm/vkms/vkms_plane.c
> @@ -29,7 +29,11 @@ static const u32 vkms_formats[] =3D {
>  	DRM_FORMAT_YUV444,
>  	DRM_FORMAT_YVU420,
>  	DRM_FORMAT_YVU422,
> -	DRM_FORMAT_YVU444
> +	DRM_FORMAT_YVU444,
> +	DRM_FORMAT_R1,
> +	DRM_FORMAT_R2,
> +	DRM_FORMAT_R4,
> +	DRM_FORMAT_R8
>  };
> =20
>  static struct drm_plane_state *
>=20

Thanks,
pq

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