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From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Thu, 28 Mar 2024 19:45:33 +0000
Message-ID: <CA+V-a8u3C_-V=s64qj-EN+YB1Men37m-r1p7x8dmEvU+JXdMJw@mail.gmail.com>
Subject: Re: [RFC PATCH 08/13] pinctrl: renesas: pinctrl-rzg2l: Add function
 pointers for writing to PFC
To: claudiu beznea <claudiu.beznea@tuxon.dev>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>, Linus Walleij <linus.walleij@linaro.org>, 
	Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, 
	Conor Dooley <conor+dt@kernel.org>, Magnus Damm <magnus.damm@gmail.com>, 
	linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, 
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, 
	Fabrizio Castro <fabrizio.castro.jz@renesas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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Hi Claudiu,

Thank you for the review.

On Thu, Mar 28, 2024 at 8:13=E2=80=AFAM claudiu beznea <claudiu.beznea@tuxo=
n.dev> wrote:
>
>
>
> On 28.03.2024 10:02, claudiu beznea wrote:
> > Hi, Prabhakar,
> >
> > On 27.03.2024 00:28, Prabhakar wrote:
> >> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >>
> >> On the RZ/G2L SoC, the PFCWE bit controls writing to PFC registers.
> >> However, on the RZ/V2H(P) SoC, the PFCWE (REGWE_A on RZ/V2H) bit contr=
ols
> >> writing to both PFC and PMC registers. To accommodate these difference=
s
> >> across SoC variants, introduce set_pfc_mode() and pm_set_pfc() functio=
n
> >> pointers.
> >
> > I think the overall code can be simplified if you add  1 function that =
does
> > the lock/unlock for PWPR. See patch 13.
>
> I meant to say one function for lock and one for unlock.
>
I agree, let me remodel it that way.

Cheers,
Prabhakar