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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Geert, Thank you for the review. On Thu, Mar 28, 2024 at 2:14=E2=80=AFPM Geert Uytterhoeven wrote: > > Hi Prabhakar, > > On Tue, Mar 26, 2024 at 11:30=E2=80=AFPM Prabhakar wrote: > > From: Lad Prabhakar > > > > Now that we have updated the macro PIN_CFG_MASK to allow for the maximu= m > > configuration bits, update the size of 'cfg' to 'u64' in the > > 'struct rzg2l_variable_pin_cfg'. > > > > Signed-off-by: Lad Prabhakar > > Thanks for your patch! > > > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > @@ -241,7 +241,7 @@ struct rzg2l_dedicated_configs { > > * @pin: port pin > > */ > > struct rzg2l_variable_pin_cfg { > > - u32 cfg:20; > > + u64 cfg:46; > > u32 port:5; > > u32 pin:3; > > Doesn't this store the 46 cfg bits in a 64-bit word, and the 8 port > and pin bits in a different 32-bit word? Worse, you'll get 4 bytes > of padding at the end of the structure. Agreed. > Changing the port and pin to u64 should make sure everything is > stored together in a single 64-bit word. > I'll change the port and pin to u64 . Cheers, Prabhakar