Received: by 2002:ab2:b82:0:b0:1f3:401:3cfb with SMTP id 2csp914377lqh; Fri, 29 Mar 2024 00:24:59 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCXQw57Vim/rsv1HZ/ANpfF6q0sQKH8rTYxztKhlrB7tkRcXnz8i3rpUM+JYNxDrP6gJr4LHAtwDKyPC7+3idaFbbR7GT8HzTxx0wgOYcA== X-Google-Smtp-Source: AGHT+IGADZ29s6FtAa/8mdxmlj5jDynnOPp3hMNAxBUJzWVz2Rnju+ZpEfhSwlPSmHdyBOnsE3ch X-Received: by 2002:a17:902:e804:b0:1e0:319a:2677 with SMTP id u4-20020a170902e80400b001e0319a2677mr2009023plg.8.1711697098886; Fri, 29 Mar 2024 00:24:58 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1711697098; cv=pass; d=google.com; s=arc-20160816; b=QesVgse+kjEzVsOLlQetqHwf6f4NfrQVBtkwaVFk34prQ8vmO4A/p4BTrZp1I9bTxi keYYUPQ50H6LAv6yMqMq4HV+7GmmhHdX8h3lauEBnHJEJ7sijfTMyVlGKqYZ5EyjxjIk gISnqnZ+a7rC+Qq8MOHgB3fQfxjvpkH8+nx0jIcZ0+mxWe+JmrETCw6zZQz13mprIRF7 h0Pgu2+AOlVx6JBnfYlqLAd0XUs5qfOWMZvkLF4XKeQ5ia7IyWFZms2jAWmZe+J2X4e0 o1SrKF9se0RlySb58Sy3KQ+YgqFVDpMyK873vZm929Er/HIo2d7b72efCL2r7fCqCjer dbGw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:message-id:date:subject:cc:to :from:dkim-signature; bh=+9VxbCTgzZ80UmziOWsKJFOvNNy0Qw1c5wWNUXcCD38=; fh=hZLm+Y2X+kBS33GoOXsFSdLabaTFAQEECIXS8sYI58E=; b=uqiN/nEb/yCRC0bCZITw5/pHOTmQxi/2JlglFijo++C2ZODDuJT2aFzPZ+ynlGzcnq /16mf/r4Eh0DTDLdbeYldb+PlCv6GaHngHuWuxzz9X0IWOi7XEB4Vdua9bIMusiL+oAi PI+NPuUDfAGJhIF5Mvk1+qZ+3rWOAj2anPSdjKYr7bGWTR/M/Y/HuvpNhigxXQDBQjoS Ps72G32TeV2QjCVhuP1rGJXr681mPEHtkf3+N0xEtzaBCFb8eWcZtn/X8i7RjVAoM6BQ CtsktxdsFSrqLMAH/MJc6yp6pP4fe+2tHCKGY31MeRJZILRqvH8GSiw06hbDfGqZHn1r F8nw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=YLcJkY4U; arc=pass (i=1 spf=pass spfdomain=sifive.com dkim=pass dkdomain=sifive.com dmarc=pass fromdomain=sifive.com); spf=pass (google.com: domain of linux-kernel+bounces-124227-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-124227-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=sifive.com Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id f5-20020a17090274c500b001e0e8e576a4si2939252plt.462.2024.03.29.00.24.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Mar 2024 00:24:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-124227-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=YLcJkY4U; arc=pass (i=1 spf=pass spfdomain=sifive.com dkim=pass dkdomain=sifive.com dmarc=pass fromdomain=sifive.com); spf=pass (google.com: domain of linux-kernel+bounces-124227-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-124227-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=sifive.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 896F8285F92 for ; Fri, 29 Mar 2024 07:24:58 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9F1C7405CD; Fri, 29 Mar 2024 07:24:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sifive.com header.i=@sifive.com header.b="YLcJkY4U" Received: from mail-pg1-f180.google.com (mail-pg1-f180.google.com [209.85.215.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C48F63FBBC for ; Fri, 29 Mar 2024 07:24:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.180 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711697086; cv=none; b=fKZZelqT5NXmbmE97+VBMdXzbXq+7yR6MS1rzqnRshOCZLZhwDfhCT3TkxDrdtcMhc3Z0+2ZC9k+NtKDqRaEc1iAqoZUwkv+lNLO5js19vcZQRl6MsWXE0neMwfMKCsFHnWbCGvsNYgblYJ6ut0wKBa33dQk+QKSFXGw0ioSiOU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711697086; c=relaxed/simple; bh=cDdC7qSNGUzpG6UlyjsDWPh/KILcYk93sgCXZ4m0Ofk=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=GOzGAIzyahrkrk74fsJwvekAcTsF+9V0zDaMzYtS/YzV2WaHEtqm6y2DRz+mjtrV4/0jVId07BgbX1Z+wSgocdFNgS+ndnGbYbnW3lZHE1AdgQ8oBaCwA0dp2qf6t2e7Ki5qx6q/yIMUkFfSjeGHvTZ6I05EPh/ihYFX63xRDw8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=sifive.com; spf=pass smtp.mailfrom=sifive.com; dkim=pass (2048-bit key) header.d=sifive.com header.i=@sifive.com header.b=YLcJkY4U; arc=none smtp.client-ip=209.85.215.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=sifive.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-pg1-f180.google.com with SMTP id 41be03b00d2f7-5d8b519e438so1258827a12.1 for ; Fri, 29 Mar 2024 00:24:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1711697083; x=1712301883; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=+9VxbCTgzZ80UmziOWsKJFOvNNy0Qw1c5wWNUXcCD38=; b=YLcJkY4UcCZP2Sv7cyrOxbTbDPiTmg3zQVnqI9tkG4F+uEK1D/dYZcqHhcgX3Hg2Cc +YfiLQflU/vKxMN+a33TY9/5/G6wGUbip/bp/1SjWWIS0CfIIuqfRMZF4lhYgwPwKYiH 6bwEfF2E6Pt3JyUXXAztgl0UkZf2kfE2etbYfMJBjE5Xr/N/7zHjyvJQzEFQ19s6VP+7 hdLI5JHjBMCr6FluhOwvhfXhlqs6cUSgbyFaceBYrPg7vndZIVpMhi2+q9Bhj7x2H1MB La2W+rN/qL9Boc2DQOU6HXWjz9H/pCdRmOzGq3/HV3x8pqqbkO9263ySIy8AOvMn0Nz3 0SxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711697083; x=1712301883; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+9VxbCTgzZ80UmziOWsKJFOvNNy0Qw1c5wWNUXcCD38=; b=YnSRDnBFwgXZg+xSoo+818Ltay+bsNWbsrTIc6m8kjn9m+rCD4+3pQMRpbnKNVZa7n 7+oHPKPDBg5csoSPZHMEtT7/jzGEbpPg9QHb7Dyq3Q+N6XC+cuCXP6a5BSlUUm8FQ6aR Lf8BY48OY35d//0doBwYJ86t6wyOxvFJ+A9qdjjvk6s6GyFOWSXi45CXYwqm536ei24x EPeHEVXpPLVuuUJoZ5/Wx4xlzacXr/X1FEhPvKwVEcboJWyGDmGvXxzg5jRLAb2z1Qiu JHRXl0XokLlC9lt9NC6HJM/WNGp9bPFLpaOZxymr0JY976VvhQz+Pemqe0rgILz6asG/ MzCw== X-Gm-Message-State: AOJu0Ywdqd30w52Iy5cZ4BBMXDFSFbwVJm1BMZxg7H9xwKbZic6kpRA5 o5AWpRFInkCqwQGheicKQZmpReVIx6jpoD3QHNpY3QxQwn85JXTzMCGppEkxJlQ= X-Received: by 2002:a05:6a20:ce4d:b0:1a3:c460:1a4f with SMTP id id13-20020a056a20ce4d00b001a3c4601a4fmr1590367pzb.59.1711697083202; Fri, 29 Mar 2024 00:24:43 -0700 (PDT) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id b8-20020a17090a010800b0029ddac03effsm4971798pjb.11.2024.03.29.00.24.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Mar 2024 00:24:42 -0700 (PDT) From: Samuel Holland To: Andrew Morton , linux-arm-kernel@lists.infradead.org, x86@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, Christoph Hellwig , loongarch@lists.linux.dev, amd-gfx@lists.freedesktop.org, Samuel Holland , Borislav Petkov , Catalin Marinas , Dave Hansen , Huacai Chen , Ingo Molnar , Jonathan Corbet , Masahiro Yamada , Nathan Chancellor , Nicolas Schier , Russell King , Thomas Gleixner , Will Deacon , linux-doc@vger.kernel.org, linux-kbuild@vger.kernel.org Subject: [PATCH v4 00/15] Unified cross-architecture kernel-mode FPU API Date: Fri, 29 Mar 2024 00:18:15 -0700 Message-ID: <20240329072441.591471-1-samuel.holland@sifive.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series unifies the kernel-mode FPU API across several architectures by wrapping the existing functions (where needed) in consistently-named functions placed in a consistent header location, with mostly the same semantics: they can be called from preemptible or non-preemptible task context, and are not assumed to be reentrant. Architectures are also expected to provide CFLAGS adjustments for compiling FPU-dependent code. For the moment, SIMD/vector units are out of scope for this common API. This allows us to remove the ifdeffery and duplicated Makefile logic at each FPU user. It then implements the common API on RISC-V, and converts a couple of users to the new API: the AMDGPU DRM driver, and the FPU self test. The underlying goal of this series is to allow using newer AMD GPUs (e.g. Navi) on RISC-V boards such as SiFive's HiFive Unmatched. Those GPUs need CONFIG_DRM_AMD_DC_FP to initialize, which requires kernel-mode FPU support. Previous versions: v3: https://lore.kernel.org/linux-kernel/20240327200157.1097089-1-samuel.holland@sifive.com/ v2: https://lore.kernel.org/linux-kernel/20231228014220.3562640-1-samuel.holland@sifive.com/ v1: https://lore.kernel.org/linux-kernel/20231208055501.2916202-1-samuel.holland@sifive.com/ v0: https://lore.kernel.org/linux-kernel/20231122030621.3759313-1-samuel.holland@sifive.com/ Changes in v4: - Add missed CFLAGS changes for recov_neon_inner.c (fixes arm build failures) - Fix x86 include guard issue (fixes x86 build failures) Changes in v3: - Rebase on v6.9-rc1 - Limit riscv ARCH_HAS_KERNEL_FPU_SUPPORT to 64BIT Changes in v2: - Add documentation explaining the built-time and runtime APIs - Add a linux/fpu.h header for generic isolation enforcement - Remove file name from header comment - Clean up arch/arm64/lib/Makefile, like for arch/arm - Remove RISC-V architecture-specific preprocessor check - Split altivec removal to a separate patch - Use linux/fpu.h instead of asm/fpu.h in consumers - Declare test_fpu() in a header Michael Ellerman (1): drm/amd/display: Only use hard-float, not altivec on powerpc Samuel Holland (14): arch: Add ARCH_HAS_KERNEL_FPU_SUPPORT ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT ARM: crypto: Use CC_FLAGS_FPU for NEON CFLAGS arm64: Implement ARCH_HAS_KERNEL_FPU_SUPPORT arm64: crypto: Use CC_FLAGS_FPU for NEON CFLAGS lib/raid6: Use CC_FLAGS_FPU for NEON CFLAGS LoongArch: Implement ARCH_HAS_KERNEL_FPU_SUPPORT powerpc: Implement ARCH_HAS_KERNEL_FPU_SUPPORT x86/fpu: Fix asm/fpu/types.h include guard x86: Implement ARCH_HAS_KERNEL_FPU_SUPPORT riscv: Add support for kernel-mode FPU drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT selftests/fpu: Move FP code to a separate translation unit selftests/fpu: Allow building on other architectures Documentation/core-api/floating-point.rst | 78 +++++++++++++++++++ Documentation/core-api/index.rst | 1 + Makefile | 5 ++ arch/Kconfig | 6 ++ arch/arm/Kconfig | 1 + arch/arm/Makefile | 7 ++ arch/arm/include/asm/fpu.h | 15 ++++ arch/arm/lib/Makefile | 3 +- arch/arm64/Kconfig | 1 + arch/arm64/Makefile | 9 ++- arch/arm64/include/asm/fpu.h | 15 ++++ arch/arm64/lib/Makefile | 6 +- arch/loongarch/Kconfig | 1 + arch/loongarch/Makefile | 5 +- arch/loongarch/include/asm/fpu.h | 1 + arch/powerpc/Kconfig | 1 + arch/powerpc/Makefile | 5 +- arch/powerpc/include/asm/fpu.h | 28 +++++++ arch/riscv/Kconfig | 1 + arch/riscv/Makefile | 3 + arch/riscv/include/asm/fpu.h | 16 ++++ arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/kernel_mode_fpu.c | 28 +++++++ arch/x86/Kconfig | 1 + arch/x86/Makefile | 20 +++++ arch/x86/include/asm/fpu.h | 13 ++++ arch/x86/include/asm/fpu/types.h | 6 +- drivers/gpu/drm/amd/display/Kconfig | 2 +- .../gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 35 +-------- drivers/gpu/drm/amd/display/dc/dml/Makefile | 36 +-------- drivers/gpu/drm/amd/display/dc/dml2/Makefile | 36 +-------- include/linux/fpu.h | 12 +++ lib/Kconfig.debug | 2 +- lib/Makefile | 26 +------ lib/raid6/Makefile | 33 +++----- lib/test_fpu.h | 8 ++ lib/{test_fpu.c => test_fpu_glue.c} | 37 ++------- lib/test_fpu_impl.c | 37 +++++++++ 38 files changed, 348 insertions(+), 193 deletions(-) create mode 100644 Documentation/core-api/floating-point.rst create mode 100644 arch/arm/include/asm/fpu.h create mode 100644 arch/arm64/include/asm/fpu.h create mode 100644 arch/powerpc/include/asm/fpu.h create mode 100644 arch/riscv/include/asm/fpu.h create mode 100644 arch/riscv/kernel/kernel_mode_fpu.c create mode 100644 arch/x86/include/asm/fpu.h create mode 100644 include/linux/fpu.h create mode 100644 lib/test_fpu.h rename lib/{test_fpu.c => test_fpu_glue.c} (71%) create mode 100644 lib/test_fpu_impl.c -- 2.44.0