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From: Witold Sadowski <wsadowski@marvell.com>
To: <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
        <devicetree@vger.kernel.org>
CC: <broonie@kernel.org>, <robh@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
        <pthombar@cadence.com>, Witold Sadowski <wsadowski@marvell.com>
Subject: [PATCH 0/5] Support for Cadence xSPI Marvell modifications
Date: Fri, 29 Mar 2024 12:48:44 -0700
Message-ID: <20240329194849.25554-1-wsadowski@marvell.com>
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This patch series is adding support for additional
Marvell HW overlay build on top of Cadence xSPI IP
It includes:
- Clock and PHY configuration
- ACPI support
- Additional MRVL HW overlay to support tranfer operations

Piyush Malgujar (1):
  driver: spi: cadence: Add ACPI support

Witold Sadowski (4):
  spi: cadence: Add new bindings documentation for Cadence XSPI
  spi: cadence: Add Marvell IP modification changes
  spi: cadence: Force single modebyte
  cadence-xspi: Add xfer capabilities

 .../devicetree/bindings/spi/cdns,xspi.yaml    |  84 ++-
 drivers/spi/spi-cadence-xspi.c                | 675 +++++++++++++++++-
 2 files changed, 738 insertions(+), 21 deletions(-)

-- 
2.17.1