Received: by 2002:ab2:1149:0:b0:1f3:1f8c:d0c6 with SMTP id z9csp270028lqz; Fri, 29 Mar 2024 16:51:10 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCVMKzg28Eicm63P4q+HhmOfHGv3DxP4WUc0fVoBFICI1LqB1yQsRPk5diAC+aq8cF8lf5+IKBo1f4hE7uqhrS4q17u9dHV4zSMqpRfenw== X-Google-Smtp-Source: AGHT+IF54QX1Tm8zmwYhpjM7vGNv/EAaGL9BDtpMfr/isSdCljY11PhOp2LDfJFZ+z81NT892ZH/ X-Received: by 2002:ac8:5716:0:b0:432:cf51:4d42 with SMTP id 22-20020ac85716000000b00432cf514d42mr381423qtw.17.1711756269834; Fri, 29 Mar 2024 16:51:09 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1711756269; cv=pass; d=google.com; s=arc-20160816; b=TtleNoISTcWvz/Hj6DfcHVMeXpKm7rjPmFXMMXuUbQ4rfvq7d3kpRe/d5qBkrHRsK0 jnByHgLQulB8nW7W04ElNVlsWzsL5cDPBJiHOwEGoB5+9Zuxkqs9dMBCeC4JR/S3SIud 3GMZD0CAdvw38HTo+3E+ln57DwcVyOxoTQhUrkHzdkziaOzeGC0D7GNhMC5V5y11KY6z 5AaL5zlM0+zwscg/3yebETgO3i85FaxF91b/UWadmtuPz2FZqsI3eOLsJEhcgCUDTvWz Jbf6beiDa8VVOJtE1VZ2l6iz65ek7sAxOYVnI/GLiWugH6il0lkDjUxn6RKgYCTfnMVP OH/A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from; bh=ihmGGHos2XTWLajNjv2Q4g1nd/mIt92yQD5RBDx5LeQ=; fh=pHEgU8vIZ2dKZDfo5+HnJ4jYKuwiESD1XRMEK8rBrI8=; b=X5pogVsf6BpLyBrmQgTjkOhPVODjtwTPHxcywUsQjT+2aLp9IWoNu1A7wSQuncNPWG w+OwuKyQ4+Egihz47l4yvsOWSwcmONsvBRuWbwxCcJIuqQ3CUP0JzNs8KdKCALcAKU+S 7timxbbWAGkVV7leujNw8k2tkHcsNBYaxfEOLROmwEtLk0jSBSxI1+TYU8ash9Q1ttuW i8T4iO12CFvt2MjRwldfGyRlvulZwMYs+QaqsHt2VUsRngxx1ovJVKJ3bgU/F2h+ZwV+ 7cEx4NfVXx4cw9uFzTAIAMHHadJ6/82pLTBZ+qSsK8XI+u4nIbqFihODdpcNpVwwjGvM V8Mg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-125534-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-125534-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [147.75.199.223]) by mx.google.com with ESMTPS id u14-20020a05622a14ce00b00430b77ac32dsi4699088qtx.766.2024.03.29.16.51.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Mar 2024 16:51:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-125534-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-125534-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-125534-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 7C88B1C20C63 for ; Fri, 29 Mar 2024 23:51:09 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D908A13E6DD; Fri, 29 Mar 2024 23:50:52 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 91B8E53379; Fri, 29 Mar 2024 23:50:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711756252; cv=none; b=J9C4lUcTvA/mGTSRd36GsmB578axEMHBYe+JHqQpwm0c2E5rjzr64BZh8faHJrYoFvvxpYNWmCjG0OKHGLL9w66Gd4ssx8hy5myvtMwd8sKwj6b2iR5XBuzgRiMnGXJ+kzdkHT3dHX+XeoDB9DEwkhiByMS7rLfdBRv+eQ3rkPg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711756252; c=relaxed/simple; bh=rBBaazLF117U4jfUSRPzXDXhpPFn1/m5OS2c0G/lMwM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=brikATmjiGgxzFuY+5NRijaLpVrmeRNqcEcUtkcuOpIVn/1aeV5bMwDcG4oU3IaOc5fa+BslgAW+peuk3FlSVyPHoj23p2moWi2Se+OL7eoSu+eh4js44eNPx1J0qFam4yxLAPFa+rH53EShlOzYqMy4VGJN6REL2PksPZjEhVU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2093012FC; Fri, 29 Mar 2024 16:51:23 -0700 (PDT) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 181123F64C; Fri, 29 Mar 2024 16:50:47 -0700 (PDT) From: Andre Przywara To: Chen-Yu Tsai , Lee Jones , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Jernej Skrabec , Samuel Holland , Ryan Walklin , Chris Morgan Subject: [PATCH 1/4] regulator: axp20x: AXP717: fix LDO supply rails and off-by-ones Date: Fri, 29 Mar 2024 23:50:30 +0000 Message-Id: <20240329235033.25309-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.35.8 In-Reply-To: <20240329235033.25309-1-andre.przywara@arm.com> References: <20240329235033.25309-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The X-Powers AXP717 PMIC has separate input supply pins for each group of LDOs, so they are not all using the same DCDC1 input, as described currently. Replace the "supply" member of each LDO description with the respective group supply name, so that the supply dependencies can be correctly described in the devicetree. Also fix two off-by-ones in the regulator macros, after some double checking the numbers against the datasheet. Fixes: d2ac3df75c3a ("regulator: axp20x: add support for the AXP717") Signed-off-by: Andre Przywara --- drivers/regulator/axp20x-regulator.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c index 34fcdd82b2eaa..3907606b091f6 100644 --- a/drivers/regulator/axp20x-regulator.c +++ b/drivers/regulator/axp20x-regulator.c @@ -140,7 +140,7 @@ #define AXP717_DCDC1_NUM_VOLTAGES 88 #define AXP717_DCDC2_NUM_VOLTAGES 107 -#define AXP717_DCDC3_NUM_VOLTAGES 104 +#define AXP717_DCDC3_NUM_VOLTAGES 103 #define AXP717_DCDC_V_OUT_MASK GENMASK(6, 0) #define AXP717_LDO_V_OUT_MASK GENMASK(4, 0) @@ -766,7 +766,7 @@ static const struct linear_range axp717_dcdc1_ranges[] = { static const struct linear_range axp717_dcdc2_ranges[] = { REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), - REGULATOR_LINEAR_RANGE(1600000, 88, 107, 100000), + REGULATOR_LINEAR_RANGE(1600000, 88, 106, 100000), }; static const struct linear_range axp717_dcdc3_ranges[] = { @@ -790,40 +790,40 @@ static const struct regulator_desc axp717_regulators[] = { AXP_DESC(AXP717, DCDC4, "dcdc4", "vin4", 1000, 3700, 100, AXP717_DCDC4_CONTROL, AXP717_DCDC_V_OUT_MASK, AXP717_DCDC_OUTPUT_CONTROL, BIT(3)), - AXP_DESC(AXP717, ALDO1, "aldo1", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, ALDO1, "aldo1", "aldoin", 500, 3500, 100, AXP717_ALDO1_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(0)), - AXP_DESC(AXP717, ALDO2, "aldo2", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, ALDO2, "aldo2", "aldoin", 500, 3500, 100, AXP717_ALDO2_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(1)), - AXP_DESC(AXP717, ALDO3, "aldo3", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, ALDO3, "aldo3", "aldoin", 500, 3500, 100, AXP717_ALDO3_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(2)), - AXP_DESC(AXP717, ALDO4, "aldo4", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, ALDO4, "aldo4", "aldoin", 500, 3500, 100, AXP717_ALDO4_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(3)), - AXP_DESC(AXP717, BLDO1, "bldo1", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, BLDO1, "bldo1", "bldoin", 500, 3500, 100, AXP717_BLDO1_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(4)), - AXP_DESC(AXP717, BLDO2, "bldo2", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, BLDO2, "bldo2", "bldoin", 500, 3500, 100, AXP717_BLDO2_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(5)), - AXP_DESC(AXP717, BLDO3, "bldo3", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, BLDO3, "bldo3", "bldoin", 500, 3500, 100, AXP717_BLDO3_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(6)), - AXP_DESC(AXP717, BLDO4, "bldo4", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, BLDO4, "bldo4", "bldoin", 500, 3500, 100, AXP717_BLDO4_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO0_OUTPUT_CONTROL, BIT(7)), - AXP_DESC(AXP717, CLDO1, "cldo1", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, CLDO1, "cldo1", "cldoin", 500, 3500, 100, AXP717_CLDO1_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO1_OUTPUT_CONTROL, BIT(0)), - AXP_DESC(AXP717, CLDO2, "cldo2", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, CLDO2, "cldo2", "cldoin", 500, 3500, 100, AXP717_CLDO2_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO1_OUTPUT_CONTROL, BIT(1)), - AXP_DESC(AXP717, CLDO3, "cldo3", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, CLDO3, "cldo3", "cldoin", 500, 3500, 100, AXP717_CLDO3_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO1_OUTPUT_CONTROL, BIT(2)), - AXP_DESC(AXP717, CLDO4, "cldo4", "vin1", 500, 3500, 100, + AXP_DESC(AXP717, CLDO4, "cldo4", "cldoin", 500, 3500, 100, AXP717_CLDO4_CONTROL, AXP717_LDO_V_OUT_MASK, AXP717_LDO1_OUTPUT_CONTROL, BIT(3)), AXP_DESC(AXP717, CPUSLDO, "cpusldo", "vin1", 500, 1400, 50, -- 2.35.8