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Date: Mon, 1 Apr 2024 23:38:03 +0100
From: Al Viro <viro@zeniv.linux.org.uk>
To: "Paul E. McKenney" <paulmck@kernel.org>
Cc: linux-kernel@vger.kernel.org, kernel-team@meta.com,
	"David S. Miller" <davem@davemloft.net>,
	Andreas Larsson <andreas@gaisler.com>,
	Palmer Dabbelt <palmer@rivosinc.com>, Arnd Bergmann <arnd@arndb.de>,
	Marco Elver <elver@google.com>
Subject: Re: [PATCH RFC cmpxchg 2/8] sparc: Emulate one-byte and two-byte
 cmpxchg
Message-ID: <20240401223803.GZ538574@ZenIV>
References: <31c82dcc-e203-48a9-aadd-f2fcd57d94c1@paulmck-laptop>
 <20240401213950.3910531-2-paulmck@kernel.org>
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Sender: Al Viro <viro@ftp.linux.org.uk>

On Mon, Apr 01, 2024 at 02:39:44PM -0700, Paul E. McKenney wrote:
> Use the new cmpxchg_emu_u8() and cmpxchg_emu_u16() to emulate one-byte
> and two-byte cmpxchg() on 32-bit sparc.

>  __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
>  {
>  	switch (size) {
> +	case 1:
> +		return cmpxchg_emu_u8((volatile u8 *)ptr, old, new_);
> +	case 2:
> +		return cmpxchg_emu_u16((volatile u16 *)ptr, old, new_);
>  	case 4:
>  		return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
>  	default:

Considering how awful sparc32 32bit cmpxchg is, it might be better to
implement those directly rather than trying to do them on top of
that.  Something like

#define CMPXCHG(T)	\
	T __cmpxchg_##T(volatile ##T *ptr, ##T old, ##T new)	\
	{							\
		unsigned long flags;				\
		##T prev;					\
								\
		spin_lock_irqsave(ATOMIC_HASH(ptr), flags);	\
		if ((prev = *ptr) == old)			\
			*ptr = new;				\
		spin_unlock_irqrestore(ATOMIC_HASH(ptr), flags);\
		return prev;					\
	}

CMPXCHG(u8)
CMPXCHG(u16)
CMPXCHG(u32)
CMPXCHG(u64)

in arch/sparc/lib/atomic32.c, replacing equivalent __cmpxchg_u{32,64}()
definitions already there and use of those in that switch in __cmpxchg()
definition...