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Tue, 02 Apr 2024 02:42:09 -0700 (PDT) Message-ID: <7088e678-dd0a-4a5d-bef3-e0816a38ce60@linaro.org> Date: Tue, 2 Apr 2024 10:42:08 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/9] arm64: dts: qcom: sm8250: describe HS signals properly Content-Language: en-US To: Dmitry Baryshkov , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss References: <20240401-typec-fix-sm8250-v3-0-604dce3ad103@linaro.org> <20240401-typec-fix-sm8250-v3-3-604dce3ad103@linaro.org> From: Bryan O'Donoghue In-Reply-To: <20240401-typec-fix-sm8250-v3-3-604dce3ad103@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 01/04/2024 21:33, Dmitry Baryshkov wrote: > Instead > there is a HighSpeed signal lane between DWC3 controller and the USB-C > connector. I still don't think this is an accurate statement. The upstream names and labels should be followed for consistency but role-switching and the DP/DN lines on the type-c port are not related. If you drop that sentence in your commit log, then add. Reviewed-by: Bryan O'Donoghue