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Tue, 02 Apr 2024 03:59:49 -0700 (PDT) Received: from localhost.localdomain ([188.27.131.149]) by smtp.gmail.com with ESMTPSA id a17-20020a170906275100b00a4644397aa9sm6398780ejd.67.2024.04.02.03.59.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Apr 2024 03:59:49 -0700 (PDT) From: Alexandru Ardelean To: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Cc: adrien.grassein@gmail.com, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, daniel@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, stefan.eichenberger@toradex.com, francesco.dolcini@toradex.com, marius.muresan@mxt.ro, irina.muresan@mxt.ro, Alexandru Ardelean Subject: [PATCH 1/2] drm/bridge: lt8912b: add support for P/N pin swap Date: Tue, 2 Apr 2024 13:59:24 +0300 Message-ID: <20240402105925.905144-1-alex@shruggie.ro> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On some HW designs, it's easier for the layout if the P/N pins are swapped. In those cases, we need to adjust (for this) by configuring the MIPI analog registers differently. Specifically, register 0x3e needs to be 0xf6 (instead of 0xd6). This change adds a 'lontium,pn-swap' device-tree property to configure the MIPI analog registers for P/N swap. Signed-off-by: Alexandru Ardelean --- drivers/gpu/drm/bridge/lontium-lt8912b.c | 25 +++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/lontium-lt8912b.c b/drivers/gpu/drm/bridge/lontium-lt8912b.c index 4b2ae27f0a57f..154126bb922b4 100644 --- a/drivers/gpu/drm/bridge/lontium-lt8912b.c +++ b/drivers/gpu/drm/bridge/lontium-lt8912b.c @@ -47,6 +47,7 @@ struct lt8912 { u8 data_lanes; bool is_power_on; + bool do_pn_swap; }; static int lt8912_write_init_config(struct lt8912 *lt) @@ -78,15 +79,31 @@ static int lt8912_write_init_config(struct lt8912 *lt) {0x55, 0x44}, {0x57, 0x01}, {0x5a, 0x02}, - - /*MIPI Analog*/ + }; + const struct reg_sequence mipi_analog_seq[] = { {0x3e, 0xd6}, {0x3f, 0xd4}, {0x41, 0x3c}, {0xB2, 0x00}, }; + const struct reg_sequence mipi_analog_pn_swap_seq[] = { + {0x3e, 0xf6}, + {0x3f, 0xd4}, + {0x41, 0x3c}, + {0xB2, 0x00}, + }; + int ret; - return regmap_multi_reg_write(lt->regmap[I2C_MAIN], seq, ARRAY_SIZE(seq)); + ret = regmap_multi_reg_write(lt->regmap[I2C_MAIN], seq, ARRAY_SIZE(seq)); + if (ret < 0) + return ret; + + if (!lt->do_pn_swap) + return regmap_multi_reg_write(lt->regmap[I2C_MAIN], mipi_analog_seq, + ARRAY_SIZE(mipi_analog_seq)); + + return regmap_multi_reg_write(lt->regmap[I2C_MAIN], mipi_analog_pn_swap_seq, + ARRAY_SIZE(mipi_analog_pn_swap_seq)); } static int lt8912_write_mipi_basic_config(struct lt8912 *lt) @@ -702,6 +719,8 @@ static int lt8912_parse_dt(struct lt8912 *lt) } lt->gp_reset = gp_reset; + lt->do_pn_swap = device_property_read_bool(dev, "lontium,pn-swap"); + data_lanes = drm_of_get_data_lanes_count_ep(dev->of_node, 0, -1, 1, 4); if (data_lanes < 0) { dev_err(lt->dev, "%s: Bad data-lanes property\n", __func__); -- 2.44.0