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Tue, 2 Apr 2024 18:30:09 GMT Received: from [10.216.46.192] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 2 Apr 2024 11:30:00 -0700 Message-ID: <62461275-16d6-935f-786a-e602b4b91dde@quicinc.com> Date: Tue, 2 Apr 2024 23:59:56 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH 6/7] dt-bindings: clock: qcom: Add GPUCC clocks for SM4450 Content-Language: en-US To: Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Vladimir Zapolskiy CC: , , , Taniya Das , "Jagadeesh Kona" , Imran Shaik , "Satya Priya Kakitapalli" References: <20240330182817.3272224-1-quic_ajipan@quicinc.com> <20240330182817.3272224-7-quic_ajipan@quicinc.com> <06bcdb86-ad14-4b52-b61b-44191d6ca22d@kernel.org> <79dd5585-db7f-4a02-bb89-b83f91067956@kernel.org> From: Ajit Pandey In-Reply-To: <79dd5585-db7f-4a02-bb89-b83f91067956@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: UT1mo3sy_L6_RGT5Pgr2n9ncxebbx9KB X-Proofpoint-ORIG-GUID: UT1mo3sy_L6_RGT5Pgr2n9ncxebbx9KB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-02_12,2024-04-01_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 clxscore=1011 impostorscore=0 bulkscore=0 adultscore=0 priorityscore=1501 mlxlogscore=923 suspectscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403210001 definitions=main-2404020137 On 3/31/2024 2:00 PM, Krzysztof Kozlowski wrote: > On 31/03/2024 10:18, Krzysztof Kozlowski wrote: >> On 30/03/2024 19:28, Ajit Pandey wrote: >>> Add support for qcom display clock controller bindings >>> for SM4450 platform. >>> >>> Signed-off-by: Ajit Pandey >>> --- >> >> Reviewed-by: Krzysztof Kozlowski > > Un-reviewed. I did not notice that this was not tested at all. > > NAK > > Please use scripts/get_maintainers.pl to get a list of necessary people > and lists to CC. It might happen, that command when run on an older > kernel, gives you outdated entries. Therefore please be sure you base > your patches on recent Linux kernel. > > Tools like b4 or scripts/get_maintainer.pl provide you proper list of > people, so fix your workflow. Tools might also fail if you work on some > ancient tree (don't, instead use mainline), work on fork of kernel > (don't, instead use mainline) or you ignore some maintainers (really > don't). Just use b4 and everything should be fine, although remember > about `b4 prep --auto-to-cc` if you added new patches to the patchset. > > You missed at least devicetree list (maybe more), so this won't be > tested by automated tooling. Performing review on untested code might be > a waste of time, thus I will skip this patch entirely till you follow > the process allowing the patch to be tested. > > Please kindly resend and include all necessary To/Cc entries. > > > Best regards, > Krzysztof > Apologies somehow missed including device tree mailing list, Thanks for review and suggestion will take care of this in next series. -- Thanks, and Regards Ajit