Received: by 2002:ab2:1149:0:b0:1f3:1f8c:d0c6 with SMTP id z9csp2555115lqz; Wed, 3 Apr 2024 01:09:52 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCUIl9JJiRI0/CDQQGhHF0aqG4XJXvY+W0fR4kb0JPlezq8r8oE5gmdIfMsT+khy2/n7Ii23w2Zgj32LfY7IbJiyj4nCI9Rn6fK5wH2Wcw== X-Google-Smtp-Source: AGHT+IEdGmkqkZ648KTozf9+/dIw0bi9YmbeP2VLKt7VNnmOkVNkLcbjXjcECYntKXgbkgPakoRJ X-Received: by 2002:a17:902:c40c:b0:1e0:bc33:d with SMTP id k12-20020a170902c40c00b001e0bc33000dmr20263170plk.31.1712131792522; Wed, 03 Apr 2024 01:09:52 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1712131792; cv=pass; d=google.com; s=arc-20160816; b=Uj5e8ZBM/IIZws47M2gGYwOkqI4u6j5DRqoV/3K5dKZzJ5WGMD75lo1bLGnTAftL7n G164XcC08alYZfc+8NDQbHfIVL4LZgFraSksDO5ccGhEx0OwiMJ3qrrNZxQKovdChYDG CyUv1OPE7Km36ZEe9mhUlBu/qltCJw332+FisNm94fTaSRgw3O2GdCDFrwx6E2RcF1Um 1ey87r6FnJ94xXz9sv89bR0+nikfeNAqC7WCGfeskqJEkoR/hOTvok67mj1iSAiq7KCK otSv1Av47kPy67d4E/ExZvKNPmlgPI++k2fgtQ7G/4uVyo+g82jPxHB5AOGgD6X/vYT8 T/2Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=4rw21DNPDWpaXnd5Gs3cWE2qTmUGGOZ0JnLHhYLDMiI=; fh=iEgamv6dbODmscQv2wzZN1BSfdyVgGmpVc4xUNBH9RU=; b=xi3Cqqhp5qGuVGvbzcaxbrKYVvMkZzbZnQxRTYOVqYoPus0XCMSUWFp2M+FDUonVCj xLVpi6fHO328ivY2/D/vwTZIAP4aZtBogMTd4PG+MbRinwY9SDg1MGSOvmQDmTS2nKR4 ZuZOTVWpStAdLLWxXUtwWjWVT5/6+smRshgxV9tT5QOfAG8oso7GCGong1TznMrttmok tukY+zyRcQAaK9O6tg0W1JMm+NLHYBk4TWfgvPrRwBNMZMv5h7Hd9JUku/3TTwx7b/tA 1/pSHYj6l8Od9kjCj6LyUHsyUvcnZoCDynnUIRfLbbmkFvLrQfOKsFjpoXkQ9MqvVqJT wnNg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=2iixUOkb; arc=pass (i=1 spf=pass spfdomain=rivosinc.com dkim=pass dkdomain=rivosinc-com.20230601.gappssmtp.com); spf=pass (google.com: domain of linux-kernel+bounces-129247-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-129247-linux.lists.archive=gmail.com@vger.kernel.org" Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id lk3-20020a17090308c300b001dd013a3cc2si12928660plb.199.2024.04.03.01.09.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Apr 2024 01:09:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-129247-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=2iixUOkb; arc=pass (i=1 spf=pass spfdomain=rivosinc.com dkim=pass dkdomain=rivosinc-com.20230601.gappssmtp.com); spf=pass (google.com: domain of linux-kernel+bounces-129247-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-129247-linux.lists.archive=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id C2BC928C2F6 for ; Wed, 3 Apr 2024 08:07:25 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3D02D75817; Wed, 3 Apr 2024 08:05:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="2iixUOkb" Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD8B97602B for ; Wed, 3 Apr 2024 08:05:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.176 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712131530; cv=none; b=kFIS+IG9OdbuUD1cAf3mf7L1tEGkX9JgkGUBkOEEaWX20k4/9bWOPnAfLPY1zS8INFSBO8MWqfXaqp51u+oWpQJVeOHFlYbcIlYVufNIJXaUFyt9q6EgnQ5kqZ2NSij0+hveoiCcDZgHqtFW5Nqc8+TNs3aGEJ+PHqKzXa4jmN0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712131530; c=relaxed/simple; bh=aDfanLTs21GL0maDPQpRseQyiyuKg+u1j0b2hveDXpI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=r6jZB0V6XrbAxf3D+2b4aACLD+qpzTTRaJV6cNZGYSi5tGiZ1WKOLGodW1imbF28pS6rHMaHXf56y81AVPJidrfcW2JNJd8+2lod08YTNafRKsZdTSoWuzT4Edl+EjM+D60iQax1vtKvwy1HA/9m5T00KkSLYXipwrUyi47JNJw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=2iixUOkb; arc=none smtp.client-ip=209.85.210.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pf1-f176.google.com with SMTP id d2e1a72fcca58-6e6bee809b8so5731846b3a.1 for ; Wed, 03 Apr 2024 01:05:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1712131527; x=1712736327; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4rw21DNPDWpaXnd5Gs3cWE2qTmUGGOZ0JnLHhYLDMiI=; b=2iixUOkb5ZvcS909cd2IhppvnztzEejMRSDC99adKGajjgp1jtLAQJ5lGxpJnmnkXf FKM3oJrgfdEAKK3vfP76gfrAjghy5khVIwIYF7SFJunpu52SD0BTSTKxP/BD27F4utB9 jTfRLGEBLDRrvUmjpBVJUVHf16VfmhhhsQNjQXFQIJI7KB2mpwfepVwdczJGhAMKYbCM aagO54xA8Bj2XqknrkufVfHoo/UOcQwcra9A1ZcLz/+Xyrfu8plWr+PwAwsahUkm10Mb XNUcukZutv8afK4JgJf4PdCY2I3mBfyn5ZjrbXcTJR2txMIppT3GM5JtHvvP+7RA/5/H Ii/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712131527; x=1712736327; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4rw21DNPDWpaXnd5Gs3cWE2qTmUGGOZ0JnLHhYLDMiI=; b=ljCgpjp3iwDfWtg8hqmDR/ur1OEOSBtu88jGaxpkNOlPbqqweY1LZpC0VUoJi+9vBT Nwn6hcEQKQU6+one2/4Lm7ayo0vcktvbnmJPRBUv2m3nQsfBMn8zfl5ELl5+Y1Z/j6c/ xpiPmAmRXgUKxMNhicDbAe0hx1Q+TqXFXQVN1bfYQ4+G652gXSUw2ErDDpYMfQaswWM0 uGZQjgoLkFt0T18xpuXXDxKRMl31HLejx0MWBbjyQEodP9mquknG2QLhOj68n1hieIUs +boH1416pNIxwFdhppM3RBgim4JD/HmoQogJMOcVDDmMFhJAf4HdAzllsY6ZzVIAW1QM QirQ== X-Gm-Message-State: AOJu0YwkjgWB9Qf/dRkXTpPqTM/BZz377DrbVf5KSBhNMI/Ly8zVOiE3 /V5it1lJ/ugZq1xpysiiwQEG7EAKsrhBHD6brjnQA7uxnUM8KRPPw+ViS/GiA4xqNfOUEwEbPSg n X-Received: by 2002:a05:6a20:17a7:b0:1a3:34c4:b184 with SMTP id bl39-20020a056a2017a700b001a334c4b184mr13823636pzb.19.1712131527654; Wed, 03 Apr 2024 01:05:27 -0700 (PDT) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id c12-20020a170902d48c00b001e0b5d49fc7sm12557229plg.161.2024.04.03.01.05.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Apr 2024 01:05:26 -0700 (PDT) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Ajay Kaher , Alexandre Ghiti , Alexey Makhalov , Andrew Jones , Anup Patel , Conor Dooley , Juergen Gross , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paolo Bonzini , Paul Walmsley , Shuah Khan , virtualization@lists.linux.dev, VMware PV-Drivers Reviewers , Will Deacon , x86@kernel.org Subject: [PATCH v5 07/22] drivers/perf: riscv: Fix counter mask iteration for RV32 Date: Wed, 3 Apr 2024 01:04:36 -0700 Message-Id: <20240403080452.1007601-8-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240403080452.1007601-1-atishp@rivosinc.com> References: <20240403080452.1007601-1-atishp@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit For RV32, used_hw_ctrs can have more than 1 word if the firmware chooses to interleave firmware/hardware counters indicies. Even though it's a unlikely scenario, handle that case by iterating over all the words instead of just using the first word. Signed-off-by: Atish Patra --- drivers/perf/riscv_pmu_sbi.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 8c3475d55433..82336fec82b8 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -771,13 +771,15 @@ static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu) { struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events); unsigned long flag = 0; + int i; if (sbi_pmu_snapshot_available()) flag = SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT; - /* No need to check the error here as we can't do anything about the error */ - sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, 0, - cpu_hw_evt->used_hw_ctrs[0], flag, 0, 0, 0); + for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++) + /* No need to check the error here as we can't do anything about the error */ + sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, i * BITS_PER_LONG, + cpu_hw_evt->used_hw_ctrs[i], flag, 0, 0, 0); } /* @@ -789,7 +791,7 @@ static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu) static noinline void pmu_sbi_start_ovf_ctrs_sbi(struct cpu_hw_events *cpu_hw_evt, unsigned long ctr_ovf_mask) { - int idx = 0; + int idx = 0, i; struct perf_event *event; unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE; unsigned long ctr_start_mask = 0; @@ -797,11 +799,12 @@ static noinline void pmu_sbi_start_ovf_ctrs_sbi(struct cpu_hw_events *cpu_hw_evt struct hw_perf_event *hwc; u64 init_val = 0; - ctr_start_mask = cpu_hw_evt->used_hw_ctrs[0] & ~ctr_ovf_mask; - - /* Start all the counters that did not overflow in a single shot */ - sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, 0, ctr_start_mask, - 0, 0, 0, 0); + for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++) { + ctr_start_mask = cpu_hw_evt->used_hw_ctrs[i] & ~ctr_ovf_mask; + /* Start all the counters that did not overflow in a single shot */ + sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, i * BITS_PER_LONG, ctr_start_mask, + 0, 0, 0, 0); + } /* Reinitialize and start all the counter that overflowed */ while (ctr_ovf_mask) { -- 2.34.1