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Date: Wed, 3 Apr 2024 13:00:42 +0300
From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Guanbing Huang <albanhuang@outlook.com>
Cc: gregkh@linuxfoundation.org, rafael.j.wysocki@intel.com,
	linux-acpi@vger.kernel.org, tony@atomide.com,
	john.ogness@linutronix.de, yangyicong@hisilicon.com,
	jirislaby@kernel.org, linux-kernel@vger.kernel.org,
	linux-serial@vger.kernel.org, lvjianmin@loongson.cn,
	albanhuang@tencent.com, tombinfan@tencent.com
Subject: Re: [PATCH v4 3/3] serial: 8250_pnp: Support configurable reg shift
 property
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Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo

On Wed, Apr 03, 2024 at 03:41:30PM +0800, Guanbing Huang wrote:
> From: Guanbing Huang <albanhuang@tencent.com>
> 
> The 16550a serial port based on the ACPI table requires obtaining the
> reg-shift attribute. In the ACPI scenario, If the reg-shift property
> is not configured like in DTS, the 16550a serial driver cannot read or
> write controller registers properly during initialization.

..

>  		uart.port.mapbase = pnp_mem_start(dev, 0);
> +		uart.port.mapsize = pnp_mem_end(dev, 0) - pnp_mem_start(dev, 0);

pnp_mem_len()

..

Add a comment here to explain that

	/*
	 * The previous call may not set iotype correctly when reg-io-width
	 * property is absent and it doesn't support IO port resource.
	 */

> +	uart.port.iotype = iotype;


>  	uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
>  	if (pnp_irq_flags(dev, 0) & IORESOURCE_IRQ_SHAREABLE)
>  		uart.port.flags |= UPF_SHARE_IRQ;
> -	uart.port.uartclk = 1843200;
> -	device_property_read_u32(&dev->dev, "clock-frequency", &uart.port.uartclk);
> -	uart.port.dev = &dev->dev;
> +	else
> +		uart.port.flags &= ~UPF_SHARE_IRQ;

This is not needed, just move

	uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;

to be before uart_read_properties().

-- 
With Best Regards,
Andy Shevchenko