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[2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id t26-20020a50ab5a000000b0056e06f02243si648432edc.86.2024.04.03.06.29.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Apr 2024 06:29:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-129834-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of linux-kernel+bounces-129834-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-129834-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 4731C1F21FE1 for ; Wed, 3 Apr 2024 13:29:52 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0F553149E0F; Wed, 3 Apr 2024 13:27:28 +0000 (UTC) Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83A9B14882C; Wed, 3 Apr 2024 13:27:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712150847; cv=none; b=S4PzN2QIRzW0p9GT0aMvcWOth0Un0kuBgpiu+t5pO2vi/2f3o2/5E6E6Q0bvU4BwrAhSVXBI+Xriimo95fnMA1WOGuYHOYC90MdllmyD3SXCaV91ApTuHGpy/wBA5N8hdUrQPsfG8F+M8JZ2HMNsYQ3sq9ijK2E19r/RdA+0C3E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712150847; c=relaxed/simple; bh=6QgsN7zHWCsySVQpuFx7Ele9sFAMP+d8EIWJZLbN6fI=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=o94ai5ExVViqO2vQrvR6SqpxBKdS2tb/S3ZTsMwc/CF6SlxsInSl7jG8jXV/ykMrcCer6Dp4WLFopPJbcmOP25UpJ5tJr0T8GmJlHUHyRvLK6uDtP4QeoYQUBF0tG3sTxpP46dq0wF+18I4B/qgUgPcS5IgwTLIRTiHbkNQNUj4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BEC4C43390; Wed, 3 Apr 2024 13:27:22 +0000 (UTC) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Vinod Koul , Bard Liao , Pierre-Louis Bossart , Sanyog Kale , linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Mark Brown Subject: [PATCH RESEND] soundwire: qcom: allow multi-link on newer devices Date: Wed, 3 Apr 2024 15:27:16 +0200 Message-Id: <20240403132716.325880-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Newer Qualcomm SoCs like X1E80100 might come with four speakers spread over two Soundwire controllers, thus they need a multi-link Soundwire stream runtime. Cc: Mark Brown Cc: alsa-devel@alsa-project.org Reviewed-by: Pierre-Louis Bossart Signed-off-by: Krzysztof Kozlowski --- Almost four months, so let's resend this one. Add Rb tag. --- drivers/soundwire/qcom.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 82b3ca5a405a..a97412c8671e 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -920,6 +920,18 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) return 0; } +static int qcom_swrm_read_prop(struct sdw_bus *bus) +{ + struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); + + if (ctrl->version >= SWRM_VERSION_2_0_0) { + bus->multi_link = true; + bus->hw_sync_min_links = 3; + } + + return 0; +} + static enum sdw_command_response qcom_swrm_xfer_msg(struct sdw_bus *bus, struct sdw_msg *msg) { @@ -1078,6 +1090,7 @@ static const struct sdw_master_port_ops qcom_swrm_port_ops = { }; static const struct sdw_master_ops qcom_swrm_ops = { + .read_prop = qcom_swrm_read_prop, .xfer_msg = qcom_swrm_xfer_msg, .pre_bank_switch = qcom_swrm_pre_bank_switch, .post_bank_switch = qcom_swrm_post_bank_switch, @@ -1196,6 +1209,15 @@ static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl, mutex_lock(&ctrl->port_lock); list_for_each_entry(m_rt, &stream->master_list, stream_node) { + /* + * For streams with multiple masters: + * Allocate ports only for devices connected to this master. + * Such devices will have ports allocated by their own master + * and its qcom_swrm_stream_alloc_ports() call. + */ + if (ctrl->bus.id != m_rt->bus->id) + continue; + if (m_rt->direction == SDW_DATA_DIR_RX) { maxport = ctrl->num_dout_ports; port_mask = &ctrl->dout_port_mask; -- 2.34.1