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AJvYcCUdYyDnJrdkSxSxdWEsYss3xUpmIOv2hCiSYAXkmUL1jM4hbRCVtOChJD+TNlJdPUvgHGxZwObj18i5AePwafjVZO9jPv/9yeiwUtZJ X-Gm-Message-State: AOJu0YzfjK1LfMnjY++ECSnE3+PFDn9PWQp5JDSlo0KF0u10Ew8Te3Sl JXp/v8geyHBIJsDQBDYqdAOMztttgu07t+RGNLR2HPyOkDl/mC8Ldf67DONOntwGGMc07lNnn0x 7r6JERnQFfI3ML7oeu912wUiHhhLRaDgn+2fQGlDmHWAFi5loUsk= X-Received: by 2002:a25:2e04:0:b0:dc7:4f61:5723 with SMTP id u4-20020a252e04000000b00dc74f615723mr13693169ybu.39.1712159662606; Wed, 03 Apr 2024 08:54:22 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240321092529.13362-1-quic_jkona@quicinc.com> <20240321092529.13362-7-quic_jkona@quicinc.com> <008d574f-9c9e-48c6-b64e-89fb469cbde4@quicinc.com> In-Reply-To: From: Dmitry Baryshkov Date: Wed, 3 Apr 2024 18:54:11 +0300 Message-ID: Subject: Re: [PATCH V2 RESEND 6/6] arm64: dts: qcom: sm8650: Add video and camera clock controllers To: Jagadeesh Kona Cc: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vladimir Zapolskiy , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Satya Priya Kakitapalli , Ajit Pandey , Imran Shaik Content-Type: text/plain; charset="UTF-8" On Wed, 3 Apr 2024 at 10:16, Jagadeesh Kona wrote: > > > > On 3/25/2024 11:38 AM, Jagadeesh Kona wrote: > > > > > > On 3/21/2024 6:43 PM, Dmitry Baryshkov wrote: > >> On Thu, 21 Mar 2024 at 11:27, Jagadeesh Kona > >> wrote: > >>> > >>> Add device nodes for video and camera clock controllers on Qualcomm > >>> SM8650 platform. > >>> > >>> Signed-off-by: Jagadeesh Kona > >>> --- > >>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 28 ++++++++++++++++++++++++++++ > >>> 1 file changed, 28 insertions(+) > >>> > >>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi > >>> b/arch/arm64/boot/dts/qcom/sm8650.dtsi > >>> index 32c0a7b9aded..d862aa6be824 100644 > >>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi > >>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > >>> @@ -4,6 +4,8 @@ > >>> */ > >>> > >>> #include > >>> +#include > >>> +#include > >>> #include > >>> #include > >>> #include > >>> @@ -3110,6 +3112,32 @@ opp-202000000 { > >>> }; > >>> }; > >>> > >>> + videocc: clock-controller@aaf0000 { > >>> + compatible = "qcom,sm8650-videocc"; > >>> + reg = <0 0x0aaf0000 0 0x10000>; > >>> + clocks = <&bi_tcxo_div2>, > >>> + <&gcc GCC_VIDEO_AHB_CLK>; > >>> + power-domains = <&rpmhpd RPMHPD_MMCX>; > >>> + required-opps = <&rpmhpd_opp_low_svs>; > >> > >> The required-opps should no longer be necessary. > >> > > > > Sure, will check and remove this if not required. > > > I checked further on this and without required-opps, if there is no vote > on the power-domain & its peer from any other consumers, when runtime > get is called on device, it enables the power domain just at the minimum > non-zero level. But in some cases, the minimum non-zero level of > power-domain could be just retention and is not sufficient for clock > controller to operate, hence required-opps property is needed to specify > the minimum level required on power-domain for this clock controller. In which cases? If it ends up with the retention vote, it is a bug which must be fixed. > > Thanks, > Jagadeesh > > > > >>> + #clock-cells = <1>; > >>> + #reset-cells = <1>; > >>> + #power-domain-cells = <1>; > >>> + }; > >>> + > >>> + camcc: clock-controller@ade0000 { > >>> + compatible = "qcom,sm8650-camcc"; > >>> + reg = <0 0x0ade0000 0 0x20000>; > >>> + clocks = <&gcc GCC_CAMERA_AHB_CLK>, > >>> + <&bi_tcxo_div2>, > >>> + <&bi_tcxo_ao_div2>, > >>> + <&sleep_clk>; > >>> + power-domains = <&rpmhpd RPMHPD_MMCX>; > >>> + required-opps = <&rpmhpd_opp_low_svs>; > >>> + #clock-cells = <1>; > >>> + #reset-cells = <1>; > >>> + #power-domain-cells = <1>; > >>> + }; > >>> + > >>> mdss: display-subsystem@ae00000 { > >>> compatible = "qcom,sm8650-mdss"; > >>> reg = <0 0x0ae00000 0 0x1000>; > >>> -- > >>> 2.43.0 > >>> > >>> > >> > >> -- With best wishes Dmitry