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[98.197.58.203]) by smtp.gmail.com with ESMTPSA id hi27-20020a056870c99b00b0022e9bd70567sm317220oab.31.2024.04.03.11.05.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Apr 2024 11:05:23 -0700 (PDT) Message-ID: Date: Wed, 3 Apr 2024 13:05:22 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH 3/7] dt-bindings: PCI: qcom: Add IPQ9574 PCIe controller Content-Language: en-US To: Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: ansuelsmth@gmail.com, robimarko@gmail.com, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240402192555.1955204-1-mr.nuke.me@gmail.com> <20240402192555.1955204-3-mr.nuke.me@gmail.com> From: mr.nuke.me@gmail.com In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/3/24 02:14, Krzysztof Kozlowski wrote: > On 02/04/2024 21:25, Alexandru Gagniuc wrote: >> IPQ9574 has PCIe controllers which are almost identical to IPQ6018. >> The only difference is that the "iface" clock is not required. >> Document this difference along with the compatible string. >> >> Signed-off-by: Alexandru Gagniuc >> --- >> .../devicetree/bindings/pci/qcom,pcie.yaml | 32 +++++++++++++++++++ >> 1 file changed, 32 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> index cf9a6910b542..6eb29547c18e 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> @@ -26,6 +26,7 @@ properties: >> - qcom,pcie-ipq8064-v2 >> - qcom,pcie-ipq8074 >> - qcom,pcie-ipq8074-gen3 >> + - qcom,pcie-ipq9574 >> - qcom,pcie-msm8996 >> - qcom,pcie-qcs404 >> - qcom,pcie-sdm845 >> @@ -383,6 +384,35 @@ allOf: >> - const: axi_s # AXI Slave clock >> - const: axi_bridge # AXI bridge clock >> - const: rchng >> + >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - qcom,pcie-ipq9574 >> + then: >> + properties: >> + clocks: >> + minItems: 4 >> + maxItems: 4 >> + clock-names: >> + items: >> + - const: axi_m # AXI Master clock >> + - const: axi_s # AXI Slave clock >> + - const: axi_bridge # AXI bridge clock >> + - const: rchng >> + >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - qcom,pcie-ipq6018 >> + - qcom,pcie-ipq8074-gen3 >> + - qcom,pcie-ipq9574 >> + then: > > Do not introduce inconsistent style. All if:then: define both clocks and > resets, right? And after your patch not anymore? > I kept the resets in one place because they are the same cross the ipq* variants. Do I understand correctly that you wish me to split up the resets as well? if ipq8074 ipq6018 clocks resets if ipq9754 clocks resets Alex > Best regards, > Krzysztof >