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Date: Thu, 4 Apr 2024 10:38:54 +0200
From: Kory Maincent <kory.maincent@bootlin.com>
To: Rob Herring <robh@kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>, Eric Dumazet
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Subject: Re: [PATCH net-next v6 11/17] dt-bindings: net: pse-pd: Add another
 way of describing several PSE PIs
Message-ID: <20240404103854.29ef418c@kmaincent-XPS-13-7390>
In-Reply-To: <20240403143142.GA3508225-robh@kernel.org>
References: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com>
	<20240326-feature_poe-v6-11-c1011b6ea1cb@bootlin.com>
	<20240402132637.GA3744978-robh@kernel.org>
	<20240403111548.30e780b5@kmaincent-XPS-13-7390>
	<20240403143142.GA3508225-robh@kernel.org>
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On Wed, 3 Apr 2024 09:31:42 -0500
Rob Herring <robh@kernel.org> wrote:

> On Wed, Apr 03, 2024 at 11:15:48AM +0200, Kory Maincent wrote:
> > On Tue, 2 Apr 2024 08:26:37 -0500
> > Rob Herring <robh@kernel.org> wrote:
> >  =20
> > > > +          pairset-names:
> > > > +            $ref: /schemas/types.yaml#/definitions/string-array
> > > > +            description:
> > > > +              Names of the pairsets as per IEEE 802.3-2022, Section
> > > > 145.2.4.
> > > > +              Valid values are "alternative-a" and "alternative-b".
> > > > Each name   =20
> > >=20
> > > Don't state constraints in prose which are defined as schema=20
> > > constraints. =20
> >=20
> > Ok, I will remove the line.
> >  =20
> > > > +          pairsets:
> > > > +            $ref: /schemas/types.yaml#/definitions/phandle-array
> > > > +            description:
> > > > +              List of phandles, each pointing to the power supply =
for
> > > > the
> > > > +              corresponding pairset named in 'pairset-names'. This
> > > > property
> > > > +              aligns with IEEE 802.3-2022, Section 33.2.3 and 145.=
2.4.
> > > > +              PSE Pinout Alternatives (as per IEEE 802.3-2022 Table
> > > > 145\u20133)
> > > > +
> > > > |-----------|---------------|---------------|---------------|------=
---------|
> > > > +              | Conductor | Alternative A | Alternative A |
> > > > Alternative B | Alternative B |
> > > > +              |           |    (MDI-X)    |     (MDI)     |      (=
X)
> > > > |      (S)      |
> > > > +
> > > > |-----------|---------------|---------------|---------------|------=
---------|
> > > > +              | 1         | Negative VPSE | Positive VPSE | \u2014
> > > >     | \u2014             |
> > > > +              | 2         | Negative VPSE | Positive VPSE | \u2014
> > > >     | \u2014             |
> > > > +              | 3         | Positive VPSE | Negative VPSE | \u2014
> > > >     | \u2014             |
> > > > +              | 4         | \u2014             | \u2014           =
  |
> > > > Negative VPSE | Positive VPSE |
> > > > +              | 5         | \u2014             | \u2014           =
  |
> > > > Negative VPSE | Positive VPSE |
> > > > +              | 6         | Positive VPSE | Negative VPSE | \u2014
> > > >     | \u2014             |
> > > > +              | 7         | \u2014             | \u2014           =
  |
> > > > Positive VPSE | Negative VPSE |
> > > > +              | 8         | \u2014             | \u2014           =
  |
> > > > Positive VPSE | Negative VPSE |
> > > > +            minItems: 1
> > > > +            maxItems: 2   =20
> > >=20
> > > "pairsets" does not follow the normal design pattern of foos, foo-nam=
es,=20
> > > and #foo-cells. You could add #foo-cells I suppose, but what would ce=
lls=20
> > > convey? I don't think it's a good fit for what you need.
> > >=20
> > > The other oddity is the number of entries and the names are fixed. Th=
at=20
> > > is usually defined per consumer.  =20
> >=20
> > Theoretically if the RJ45 port binding was supported it would make more
> > sense, but in reality it's not feasible as the PSE controller need this
> > information in its init process.
> > The PSE controller reset all its port to apply a configuration so we ca=
n't
> > do it when the consumer (RJ45) probe. It would reset the other ports if=
 one
> > consumer is probed later in the process. =20
>=20
> There is no reason other than convenience that all information some=20
> driver needs has to be in one node or one hierarchy of nodes. You can=20
> fetch anything from anywhere in the DT. It does feel like some of this=20
> belongs in a connector node. We often haven't described connectors in DT=
=20
> and stick connector properties in the controller node associated with=20
> the connector. Then as things get more complicated, it becomes a mess.=20

Right, we could indeed put all the informations of the pse_pi node in the f=
uture
RJ45 port abstraction node. Then, this series will be put aside until we ma=
nage
to have the port abstraction get merged.
I am not glad about this as it will stuck my work until then, but indeed
removing this pse_pi wrapper node which is between the pse_controller node =
and
the connector node seems cleaner.

Regards,
--=20
K=C3=B6ry Maincent, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com