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AJvYcCVU9pjDrZm/J+2y9Xe9mQuEIkchSg5zHPtY5G/7QBTjRjstT48Qz015k8fCZSCszdRw5yw7wEIpY1O1hooSRudra9na7V0uTD9W9TfN X-Gm-Message-State: AOJu0YyDd68SeLy592F1tdxY7Sh/yUikbKqyYaz6nBu+npekU4P1xgUc /CEp/CsV4U1uXDnkMG21tFRvxE+0d6bm/EkflNSijBDbLTGuH5Df9YiX7qErk1Y= X-Received: by 2002:a05:6512:3a91:b0:515:8564:28c8 with SMTP id q17-20020a0565123a9100b00515856428c8mr1952674lfu.67.1712233577227; Thu, 04 Apr 2024 05:26:17 -0700 (PDT) Received: from gpeter-l.roam.corp.google.com ([148.252.128.204]) by smtp.gmail.com with ESMTPSA id bu14-20020a056000078e00b003434b41c83fsm12106303wrb.81.2024.04.04.05.26.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Apr 2024 05:26:14 -0700 (PDT) From: Peter Griffin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, jejb@linux.ibm.com, martin.petersen@oracle.com, chanho61.park@samsung.com, ebiggers@kernel.org Cc: linux-scsi@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, Peter Griffin Subject: [PATCH 01/17] dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit Date: Thu, 4 Apr 2024 13:25:43 +0100 Message-ID: <20240404122559.898930-2-peter.griffin@linaro.org> X-Mailer: git-send-email 2.44.0.478.gd926399ef9-goog In-Reply-To: <20240404122559.898930-1-peter.griffin@linaro.org> References: <20240404122559.898930-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add dt schema documentation and clock IDs for the High Speed Interface 2 (HSI2) clock management unit. This CMU feeds high speed interfaces such as PCIe and UFS. Signed-off-by: Peter Griffin --- .../bindings/clock/google,gs101-clock.yaml | 30 +++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml index 1d2bcea41c85..a202fd5d1ead 100644 --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml @@ -32,14 +32,15 @@ properties: - google,gs101-cmu-misc - google,gs101-cmu-peric0 - google,gs101-cmu-peric1 + - google,gs101-cmu-hsi2 clocks: minItems: 1 - maxItems: 3 + maxItems: 5 clock-names: minItems: 1 - maxItems: 3 + maxItems: 5 "#clock-cells": const: 1 @@ -112,6 +113,31 @@ allOf: - const: bus - const: ip + - if: + properties: + compatible: + contains: + enum: + - google,gs101-cmu-hsi2 + + then: + properties: + clocks: + items: + - description: External reference clock (24.576 MHz) + - description: High Speed Interface bus clock (from CMU_TOP) + - description: High Speed Interface pcie clock (from CMU_TOP) + - description: High Speed Interface ufs clock (from CMU_TOP) + - description: High Speed Interface mmc clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: pcie + - const: ufs_embd + - const: mmc_card + additionalProperties: false examples: -- 2.44.0.478.gd926399ef9-goog