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Thu, 4 Apr 2024 15:15:39 +0300 From: Dmitry Rokosov To: , , , , , , , , CC: , , , , Ezra Buehler , , Martin Kurbanov , Dmitry Rokosov Subject: [PATCH v1] mtd: spinand: Add support for 5-byte IDs Date: Thu, 4 Apr 2024 15:15:21 +0300 Message-ID: <20240404121532.14755-1-ddrokosov@salutedevices.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184579 [Apr 04 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: ddrokosov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 14 0.3.14 5a0c43d8a1c3c0e5b0916cc02a90d4b950c01f96, {Tracking_uf_ne_domains}, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2;lore.kernel.org:7.1.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;127.0.0.199:7.1.2;salutedevices.com:7.1.1;smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean, bases: 2024/04/04 11:24:00 X-KSMG-LinksScanning: Clean, bases: 2024/04/04 11:24:00 X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/04/04 07:34:00 #24651931 X-KSMG-AntiVirus-Status: Clean, skipped From: Ezra Buehler [ Upstream commit 34a956739d295de6010cdaafeed698ccbba87ea4 ] E.g. ESMT chips will return an identification code with a length of 5 bytes. In order to prevent ambiguity, flash chips would actually need to return IDs that are up to 17 or more bytes long due to JEDEC's continuation scheme. I understand that if a manufacturer ID is located in bank N of JEDEC's database (there are currently 16 banks), N - 1 continuation codes (7Fh) need to be added to the identification code (comprising of manufacturer ID and device ID). However, most flash chip manufacturers don't seem to implement this (correctly). Cc: # 6.6.23 Cc: # 6.7.11 Cc: # 6.8.2 Signed-off-by: Ezra Buehler Reviewed-by: Martin Kurbanov Tested-by: Martin Kurbanov Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20240125200108.24374-2-ezra@easyb.ch Signed-off-by: Dmitry Rokosov --- In the patch series [1] only one patch was marked with Fixes tag, that's why the secon patch was not applied to 6.6.y, 6.7.y and 6.8y. It breaks ESMT detection flow with logs: [ 0.770730] spi-nand spi0.0: unknown raw ID c8017f7f [ 0.772688] spi-nand: probe of spi0.0 failed with error -524 Please cherry-pick the second patch from the series to 6.6.y, 6.7.y and 6.8.y. Links: [1] https://lore.kernel.org/linux-mtd/20240125200108.24374-1-ezra@easyb.ch/ --- include/linux/mtd/spinand.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index badb4c1ac079..5c19ead60499 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -169,7 +169,7 @@ struct spinand_op; struct spinand_device; -#define SPINAND_MAX_ID_LEN 4 +#define SPINAND_MAX_ID_LEN 5 /* * For erase, write and read operation, we got the following timings : * tBERS (erase) 1ms to 4ms -- 2.43.0