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[2001:14ba:a00e:a300::227]) by smtp.gmail.com with ESMTPSA id b19-20020a056512071300b00515abab7697sm2286667lfs.55.2024.04.04.05.30.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Apr 2024 05:30:21 -0700 (PDT) From: Dmitry Baryshkov To: dri-devel@lists.freedesktop.org, Adam Ford Cc: aford@beaconembedded.com, laurent.pinchart@ideasonboard.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: (subset) [PATCH V2 1/2] drm/bridge: adv7511: Allow IRQ to share GPIO pins Date: Thu, 4 Apr 2024 15:30:19 +0300 Message-ID: <171223381119.1231870.1373781151741394452.b4-ty@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305004859.201085-1-aford173@gmail.com> References: <20240305004859.201085-1-aford173@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Mon, 04 Mar 2024 18:48:57 -0600, Adam Ford wrote: > The IRQ registration currently assumes that the GPIO is dedicated > to it, but that may not necessarily be the case. If the board has > another device sharing the GPIO, it won't be registered and the > hot-plug detect fails to function. > > Currently, the handler reads two registers and blindly > assumes one of them caused the interrupt and returns IRQ_HANDLED > unless there is an error. In order to properly do this, the IRQ > handler needs to check if it needs to handle the IRQ and return > IRQ_NONE if there is nothing to handle. With the check added > and the return code properly indicating whether or not it there > was an IRQ, the IRQF_SHARED can be set to share a GPIO IRQ. > > [...] Applied to drm-misc-next, thanks! [1/2] drm/bridge: adv7511: Allow IRQ to share GPIO pins commit: f3d9683346d6b1d6e24f57e954385995601594d4 Best regards, -- With best wishes Dmitry