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It will disable irq during SPI transfer, and re-eanble irq after SPI transfer. That may cause irq status bit set to 1 during spi transfer. When the active condition has been detected, the corresponding bit remains set until cleared by software. Status flags are cleared by writing a 1 to the corresponding bit position. Signed-off-by: Markus Burri --- drivers/iio/adc/ad_sigma_delta.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index a602429cdde4..59544c39642a 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -515,6 +515,10 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p) irq_handled: iio_trigger_notify_done(indio_dev->trig); + /* + * ACK pending interrupts from spi transfer. + */ + irq_gc_ack_set_bit(irq_get_irq_data(sigma_delta->spi->irq)); sigma_delta->irq_dis = false; enable_irq(sigma_delta->spi->irq); -- 2.39.2