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[87.246.222.101]) by smtp.gmail.com with ESMTPSA id y3-20020a05651c020300b002d429304a20sm116880ljn.8.2024.04.05.01.41.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Apr 2024 01:41:32 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH 0/6] Add SMEM-based speedbin matching Date: Fri, 05 Apr 2024 10:41:28 +0200 Message-Id: <20240405-topic-smem_speedbin-v1-0-ce2b864251b1@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIADi5D2YC/x2MOwqAMBAFryJbG4jBQryKiGjy1C3yISsiBO9uk KmmmCkkyAyhsSmUcbNwDFW6tiF7ruGAYledjDa9rqgrJrZKPPwiCXAbBzU4wDq9YdegWqaMnZ/ /Os3v+wGXQs2aZQAAAA== To: Bjorn Andersson , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Neil Armstrong , Konrad Dybcio X-Mailer: b4 0.13-dev-0438c Newer (SM8550+) SoCs don't seem to have a nice speedbin fuse anymore, but instead rely on a set of combinations of "feature code" (FC) and "product code" (PC) identifiers to match the bins. This series adds support for that. I suppose a qcom/for-soc immutable branch would be in order if we want to land this in the upcoming cycle. FWIW I preferred the fuses myself.. Signed-off-by: Konrad Dybcio --- Konrad Dybcio (5): soc: qcom: Move some socinfo defines to the header, expand them soc: qcom: smem: Add pcode/fcode getters drm/msm/adreno: Implement SMEM-based speed bin drm/msm/adreno: Add speedbin data for SM8550 / A740 arm64: dts: qcom: sm8550: Wire up GPU speed bin & more OPPs Neil Armstrong (1): drm/msm/adreno: Allow specifying default speedbin value arch/arm64/boot/dts/qcom/sm8550.dtsi | 21 +++++++++- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +++-- drivers/gpu/drm/msm/adreno/adreno_device.c | 16 ++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 39 ++++++++++++++++-- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 13 ++++-- drivers/soc/qcom/smem.c | 66 ++++++++++++++++++++++++++++++ drivers/soc/qcom/socinfo.c | 8 ---- include/linux/soc/qcom/smem.h | 2 + include/linux/soc/qcom/socinfo.h | 36 ++++++++++++++++ 9 files changed, 191 insertions(+), 20 deletions(-) --- base-commit: 2b3d5988ae2cb5cd945ddbc653f0a71706231fdd change-id: 20240404-topic-smem_speedbin-8deecd0bef0e Best regards, -- Konrad Dybcio