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AJvYcCUkknEPEnsADwnLNadFjIj41dmAI5cXSWMdKAIvygZP0WL8D+ZNFb6CXuVeLDuPA0MIjEKSwH++BPJhcvpxainXwJwjllzKkK9L4TJv X-Gm-Message-State: AOJu0YzHW048y/zO+AOtKPRwVvtmeDSaM8u6RYT2FsEF1tN2ZxKTD393 KJitGy43dapuwtHoyK9pcSyYElnPuhz/DVufp/l9bbpN8MxIZ+zgHcAK5FW8PN276NCrgOR6fpN glw== X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:90b:214:b0:2a0:40df:2f57 with SMTP id fy20-20020a17090b021400b002a040df2f57mr8680pjb.6.1712361376966; Fri, 05 Apr 2024 16:56:16 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 5 Apr 2024 16:55:58 -0700 In-Reply-To: <20240405235603.1173076-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240405235603.1173076-1-seanjc@google.com> X-Mailer: git-send-email 2.44.0.478.gd926399ef9-goog Message-ID: <20240405235603.1173076-6-seanjc@google.com> Subject: [PATCH 05/10] KVM: x86: Inhibit code #DBs in MOV-SS shadow for all Intel compat vCPUs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Sandipan Das , Jim Mattson , Like Xu Content-Type: text/plain; charset="UTF-8" Treat code #DBs as inhibited in MOV/POP-SS shadows for vCPU models that are Intel compatible, not just strictly vCPUs with vendor==Intel. The behavior is explicitly called out in the SDM, and thus architectural, i.e. applies to all CPUs that implement Intel's architecture, and isn't a quirk that is unique to CPUs manufactured by Intel: However, if an instruction breakpoint is placed on an instruction located immediately after a POP SS/MOV SS instruction, the breakpoint will be suppressed as if EFLAGS.RF were 1. Applying the behavior strictly to Intel wasn't intentional, KVM simply didn't have a concept of "Intel compatible" as of commit baf67ca8e545 ("KVM: x86: Suppress code #DBs on Intel if MOV/POP SS blocking is active"). Signed-off-by: Sean Christopherson --- arch/x86/kvm/x86.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d9719141502a..8ea6f4fc910f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -8984,19 +8984,17 @@ EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction); static bool kvm_is_code_breakpoint_inhibited(struct kvm_vcpu *vcpu) { - u32 shadow; - if (kvm_get_rflags(vcpu) & X86_EFLAGS_RF) return true; /* - * Intel CPUs inhibit code #DBs when MOV/POP SS blocking is active, - * but AMD CPUs do not. MOV/POP SS blocking is rare, check that first - * to avoid the relatively expensive CPUID lookup. + * Intel compatible CPUs inhibit code #DBs when MOV/POP SS blocking is + * active, but AMD compatible CPUs do not. */ - shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu); - return (shadow & KVM_X86_SHADOW_INT_MOV_SS) && - guest_cpuid_is_intel(vcpu); + if (!guest_cpuid_is_intel_compatible(vcpu)) + return false; + + return static_call(kvm_x86_get_interrupt_shadow)(vcpu) & KVM_X86_SHADOW_INT_MOV_SS; } static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, -- 2.44.0.478.gd926399ef9-goog