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Sat, 6 Apr 2024 09:21:29 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DFAE62C6B8; Sat, 6 Apr 2024 09:18:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IPLRPBoU" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E858B2C6AE; Sat, 6 Apr 2024 09:18:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712395131; cv=none; b=ZUEcMwVsTqBR8Ku+XoE02/RLxyYVQLpwubpgVODuPgOd5nPRtLNlnYr1CQgdTAOzgZi00hsaCZl5iIEMMPiVbmT2Q893L823cnTRCWAu8PSQxq45ilMAYvShVnN9UM2wCwWqCxvX79XQrZP3IYcvGskouZOvDfEtsp2sMzF3Z2M= ARC-Message-Signature:i=1; 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charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.12.3 On Wed, 27 Mar 2024 08:19:37 +0100, Marcel Ziswiler wrote: > On the i.MX 8M Mini, the AUX_PLL_REFCLK_SEL has to be left at its reset > default of AUX_IN (PLL clock). > > Background Information: > In our automated testing setup, we use Delock Mini-PCIe SATA cards [1]. > While this setup has proven very stable overall we noticed upstream on > the i.MX 8M Mini fails quite regularly (about 50/50) to bring up the > PCIe link while with NXP's downstream BSP 5.15.71_2.2.2 it always works. > As that old downstream stuff was quite different, I first also tried > NXP's latest downstream BSP 6.1.55_2.2.0 which from a PCIe point of view > is fairly vanilla, however, also there the PCIe link-up was not stable. > Comparing and debugging I noticed that upstream explicitly configures > the AUX_PLL_REFCLK_SEL to I_PLL_REFCLK_FROM_SYSPLL while working > downstream [2] leaving it at reset defaults of AUX_IN (PLL clock). > Unfortunately, the TRM does not mention any further details about this > register (both for the i.MX 8M Mini as well as the Plus). > NXP confirmed their validation codes for the i.MX8MM PCIe doesn't > configure cmn_reg063 (offset: 0x18C). > BTW: On the i.MX 8M Plus we have not seen any issues with PCIe with the > exact same setup which is why I left it unchanged. > > [...] Applied, thanks! [1/1] phy: freescale: imx8m-pcie: fix pcie link-up instability commit: 3a161017f1de55cc48be81f6156004c151f32677 Best regards, -- ~Vinod