Received: by 2002:ab2:3350:0:b0:1f4:6588:b3a7 with SMTP id o16csp686759lqe; Sat, 6 Apr 2024 21:45:55 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUnJyxeUSdPFTaLMGeRHyiVZRduZq3FrsMK9Wv+zEmpfIRmpZhwrxNwrO4tNezcplSF3SBeieuIiYQB/zMhszYsdUuIY1R3IhO/vSggiw== X-Google-Smtp-Source: AGHT+IH9lz/T/9ysTjaOfpbVT5yTgHAxJyLj8sCU2CIy9pO9Zfyjd9JH0i2UZLqvpEQXiQL92mj/ X-Received: by 2002:ac8:5749:0:b0:432:c456:509e with SMTP id 9-20020ac85749000000b00432c456509emr6955784qtx.10.1712465154764; Sat, 06 Apr 2024 21:45:54 -0700 (PDT) Return-Path: Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id y13-20020a05622a120d00b004345ecd6392si5062246qtx.169.2024.04.06.21.45.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Apr 2024 21:45:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-134170-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ventanamicro.com header.s=google header.b="KlnhA/+2"; arc=fail (body hash mismatch); spf=pass (google.com: domain of linux-kernel+bounces-134170-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-134170-linux.lists.archive=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 700681C21B67 for ; Sun, 7 Apr 2024 04:45:54 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1F5293C0D; Sun, 7 Apr 2024 04:45:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="KlnhA/+2" Received: from mail-lj1-f171.google.com (mail-lj1-f171.google.com [209.85.208.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0588EDC for ; Sun, 7 Apr 2024 04:45:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712465147; cv=none; b=R7fcuFWGiY3dVp5823yzYTdTf6JgKCoZplk869XHDooinvPoEr+w3L366mMpC+drH3tfdjEjRBrdzrXbImH1Sg0KIbH5Gu4oSpParFX+kbZ07WEbr3wCtWVyX8Kaz6OM6FNelYvs1qdJvOBlHd06vPILnvVfBOgCKW1ATd/kS3g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712465147; c=relaxed/simple; bh=INxIervR3VDxQw8sARKqwRWBD00LGNPMY+fDGaAjOdw=; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject: To:Cc:Content-Type; b=e4EG78RudR0WZgiEuUs9PBSo+7aSkn63qsDGG/0JzQZGkNVAej6IXCPZzuI8qQReY9zpM1K9bEvGl55suFPHOeKIaM45qCrrHJdOu53k/rSpr8QJP8dkhD+83DkuKGNiILxSb2nXVe/ypH49qbCcNdKa2k6/OZ/9HcBE/CL8tc8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=KlnhA/+2; arc=none smtp.client-ip=209.85.208.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-lj1-f171.google.com with SMTP id 38308e7fff4ca-2d88a869ce6so187991fa.3 for ; Sat, 06 Apr 2024 21:45:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1712465143; x=1713069943; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=+Wx+tvzf/dqR7g3UekoPgNpWDOrGKteh8fMPAcmqeh0=; b=KlnhA/+2FclbG4xdZDhpyrCvbYn3h2ZROu30Hc5ocrvaEoG9pw6o2jYtbwsXXMCCDa dvdzZSJWGSOF4UJ+48tjTazGBl7jiXcqaCIJiqzirfncLZbm0OkgMO6HDdZLbWamVWr9 vt/O59LulvGHDAdxcYbddx1xl5LRAy6OhO+1Q4pl/IfbMW00hkswZvCRgPewIenNo0iC EjSxQxrmIFsFIh1Xjkeiz42q9/Nwm0l1EfP+gtyJIopoW1QJ22Bi0CnG3Pw82Qb1lQ56 N0COiWS50qw3iT7O0jBakZG31v7yQkOrwxkAGgy3vgS0kyCJV/YT9J6V2/QnTI8CIGDC DbdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712465143; x=1713069943; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+Wx+tvzf/dqR7g3UekoPgNpWDOrGKteh8fMPAcmqeh0=; b=uVV+E1HC1ILAj92TV2tb6YUSgW2QPgtPVKklYJPpCfH9AxclyItVRqTpwhXJ9DBbVk kW9c10oWock/J5wTy+mN+osWqq5rwSERSUtOywPGrGm2+p+x2BFnJBxuu+qYlArY0z5Q e0wJxqvJ3L2/DZplv5bgVImgXTSaqSlr8mxhJFDTSYWMtPHm8qAmHd1ltH3U1eR69UBc GLcPFalOYrbxyhKupH9hpFbkiCLF7zFMwb/HgPoqJ6tYBRp3Mdlzso1YHBehkRv/ZCfg SjnGZFTXmiDabf0Boqd8AE64DcSCj5X+caiXWYofMuVbF0eYN12oSKQcjBJLURz6W0zC j8yw== X-Forwarded-Encrypted: i=1; AJvYcCUO3g7c1SNMIIJzcytszGBCW5NCJpq9G16GCEZMTLbwrciurM9PgP/U4G3E76GiWYtpnf7Hy2Iwe4LpGpfMKlnCuHkz4N5afZ9UtX8K X-Gm-Message-State: AOJu0Yw07fwgrwZVT3tBm4ALfePnLUZG9G17Yo7wvlOhzQsDDuVvg+yX W8JMWdaQ2u0XyXt7PZ9qugL3slksROB+Pjv608tNXqFXbegYYjDS62K5ny6B6hvOj7b0FnyaXre E87cRlsNQPMqxza0R6T131oPm5dQyFKTeKaBilg== X-Received: by 2002:a2e:9f0c:0:b0:2d4:3d86:54e2 with SMTP id u12-20020a2e9f0c000000b002d43d8654e2mr3747138ljk.27.1712465142893; Sat, 06 Apr 2024 21:45:42 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240401082019.2318193-1-haibo1.xu@intel.com> <20240402-7bd2b9ed00094befa6927b60@orel> In-Reply-To: From: Anup Patel Date: Sun, 7 Apr 2024 10:15:31 +0530 Message-ID: Subject: Re: [PATCH] KVM: riscv: selftests: Add SBI base extension test To: Haibo Xu Cc: Andrew Jones , Haibo Xu , Paolo Bonzini , Shuah Khan , Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, Apr 7, 2024 at 8:11=E2=80=AFAM Haibo Xu wrote= : > > On Tue, Apr 2, 2024 at 10:12=E2=80=AFPM Andrew Jones wrote: > > > > On Mon, Apr 01, 2024 at 04:20:18PM +0800, Haibo Xu wrote: > > > This is the first patch to enable the base extension selftest > > > for the SBI implementation in KVM. Test for other extensions > > > will be added later. > > > > I'm not sure we want SBI tests in KVM selftests since we already > > plan to add them to kvm-unit-tests, where they can be used to > > test both KVM's SBI implementation and M-mode firmware implementations. > > If we also have them here, then we'll end up duplicating that effort. > > > > Thanks for the information, Andrew! > > The SBI KVM selftest was planned last year when I talked with Anup about > KVM selftest support on RISC-V. Since the kvm-unit-tests has already cove= red > it, I'm fine to drop the support in KVM selftest. Initially we did plan to have all SBI tests under KVM selftests but later we decided to have SBI tests at a common place which will benefit all hypervisors and M-mode firmwares implementing SBI spec. Instead of this, I suggest we should have more selfttests targeting AIA (CSRs, IMSIC, and APLIC) virtualization. Regards, Anup > > Regards, > Haibo > > > I do like the approach of only checking for an error, rather than > > also for a value, for these ID getters. In kvm-unit-tests we're > > currently requiring that the expected value be passed in, otherwise > > the whole test is skipped. We could fallback to only checking for > > an error instead, as is done here. > > > > Thanks, > > drew > > > > > > > > Signed-off-by: Haibo Xu > > > --- > > > tools/testing/selftests/kvm/Makefile | 1 + > > > .../selftests/kvm/include/riscv/processor.h | 8 +- > > > tools/testing/selftests/kvm/riscv/sbi_test.c | 95 +++++++++++++++++= ++ > > > 3 files changed, 103 insertions(+), 1 deletion(-) > > > create mode 100644 tools/testing/selftests/kvm/riscv/sbi_test.c > > > > > > diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/sel= ftests/kvm/Makefile > > > index 741c7dc16afc..a6acbbcad757 100644 > > > --- a/tools/testing/selftests/kvm/Makefile > > > +++ b/tools/testing/selftests/kvm/Makefile > > > @@ -189,6 +189,7 @@ TEST_GEN_PROGS_s390x +=3D rseq_test > > > TEST_GEN_PROGS_s390x +=3D set_memory_region_test > > > TEST_GEN_PROGS_s390x +=3D kvm_binary_stats_test > > > > > > +TEST_GEN_PROGS_riscv +=3D riscv/sbi_test > > > TEST_GEN_PROGS_riscv +=3D arch_timer > > > TEST_GEN_PROGS_riscv +=3D demand_paging_test > > > TEST_GEN_PROGS_riscv +=3D dirty_log_test > > > diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/= tools/testing/selftests/kvm/include/riscv/processor.h > > > index ce473fe251dd..df530ac751c4 100644 > > > --- a/tools/testing/selftests/kvm/include/riscv/processor.h > > > +++ b/tools/testing/selftests/kvm/include/riscv/processor.h > > > @@ -178,7 +178,13 @@ enum sbi_ext_id { > > > }; > > > > > > enum sbi_ext_base_fid { > > > - SBI_EXT_BASE_PROBE_EXT =3D 3, > > > + SBI_EXT_BASE_GET_SPEC_VERSION =3D 0, > > > + SBI_EXT_BASE_GET_IMP_ID, > > > + SBI_EXT_BASE_GET_IMP_VERSION, > > > + SBI_EXT_BASE_PROBE_EXT, > > > + SBI_EXT_BASE_GET_MVENDORID, > > > + SBI_EXT_BASE_GET_MARCHID, > > > + SBI_EXT_BASE_GET_MIMPID, > > > }; > > > > > > struct sbiret { > > > diff --git a/tools/testing/selftests/kvm/riscv/sbi_test.c b/tools/tes= ting/selftests/kvm/riscv/sbi_test.c > > > new file mode 100644 > > > index 000000000000..b9378546e3b6 > > > --- /dev/null > > > +++ b/tools/testing/selftests/kvm/riscv/sbi_test.c > > > @@ -0,0 +1,95 @@ > > > +// SPDX-License-Identifier: GPL-2.0 > > > +/* > > > + * sbi_test - SBI API test for KVM's SBI implementation. > > > + * > > > + * Copyright (c) 2024 Intel Corporation > > > + * > > > + * Test cover the following SBI extentions: > > > + * - Base: All functions in this extension should be supported > > > + */ > > > + > > > +#include "kvm_util.h" > > > +#include "processor.h" > > > +#include "test_util.h" > > > + > > > +/* > > > + * Test that all functions in the base extension must be supported > > > + */ > > > +static void base_ext_guest_code(void) > > > +{ > > > + struct sbiret ret; > > > + > > > + /* > > > + * Since the base extension was introduced in SBI Spec v0.2, > > > + * assert if the implemented SBI version is below 0.2. > > > + */ > > > + ret =3D sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_SPEC_VERSION, = 0, > > > + 0, 0, 0, 0, 0); > > > + __GUEST_ASSERT(!ret.error && ret.value >=3D 2, "Get Spec Versio= n Error: ret.error=3D%ld, " > > > + "ret.value=3D%ld\n", ret.error, ret.value); > > > + > > > + ret =3D sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_IMP_ID, 0, > > > + 0, 0, 0, 0, 0); > > > + __GUEST_ASSERT(!ret.error && ret.value =3D=3D 3, "Get Imp ID Er= ror: ret.error=3D%ld, " > > > + "ret.value=3D%ld\n", > > > + ret.error, ret.value); > > > + > > > + ret =3D sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_IMP_VERSION, 0= , > > > + 0, 0, 0, 0, 0); > > > + __GUEST_ASSERT(!ret.error, "Get Imp Version Error: ret.error=3D= %ld\n", ret.error); > > > + > > > + ret =3D sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, SBI_EXT= _BASE, > > > + 0, 0, 0, 0, 0); > > > + __GUEST_ASSERT(!ret.error && ret.value =3D=3D 1, "Probe ext Err= or: ret.error=3D%ld, " > > > + "ret.value=3D%ld\n", > > > + ret.error, ret.value); > > > + > > > + ret =3D sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_MVENDORID, 0, > > > + 0, 0, 0, 0, 0); > > > + __GUEST_ASSERT(!ret.error, "Get Machine Vendor ID Error: ret.er= ror=3D%ld\n", ret.error); > > > + > > > + ret =3D sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_MARCHID, 0, > > > + 0, 0, 0, 0, 0); > > > + __GUEST_ASSERT(!ret.error, "Get Machine Arch ID Error: ret.erro= r=3D%ld\n", ret.error); > > > + > > > + ret =3D sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_MIMPID, 0, > > > + 0, 0, 0, 0, 0); > > > + __GUEST_ASSERT(!ret.error, "Get Machine Imp ID Error: ret.error= =3D%ld\n", ret.error); > > > + > > > + GUEST_DONE(); > > > +} > > > + > > > +static void sbi_base_ext_test(void) > > > +{ > > > + struct kvm_vm *vm; > > > + struct kvm_vcpu *vcpu; > > > + struct ucall uc; > > > + > > > + vm =3D vm_create_with_one_vcpu(&vcpu, base_ext_guest_code); > > > + while (1) { > > > + vcpu_run(vcpu); > > > + TEST_ASSERT(vcpu->run->exit_reason =3D=3D UCALL_EXIT_RE= ASON, > > > + "Unexpected exit reason: %u (%s),", > > > + vcpu->run->exit_reason, exit_reason_str(vcp= u->run->exit_reason)); > > > + > > > + switch (get_ucall(vcpu, &uc)) { > > > + case UCALL_DONE: > > > + goto done; > > > + case UCALL_ABORT: > > > + fprintf(stderr, "Guest assert failed!\n"); > > > + REPORT_GUEST_ASSERT(uc); > > > + default: > > > + TEST_FAIL("Unexpected ucall %lu", uc.cmd); > > > + } > > > + } > > > + > > > +done: > > > + kvm_vm_free(vm); > > > +} > > > + > > > +int main(void) > > > +{ > > > + sbi_base_ext_test(); > > > + > > > + return 0; > > > +} > > > -- > > > 2.34.1 > > > >