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07 Apr 2024 00:07:12 -0700 Message-ID: Date: Sun, 7 Apr 2024 15:06:07 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Cc: baolu.lu@linux.intel.com, "Zhang, Tina" , "Liu, Yi L" , "iommu@lists.linux.dev" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 07/12] iommu/vt-d: Cleanup use of iommu_flush_iotlb_psi() To: "Tian, Kevin" , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe References: <20240325021705.249769-1-baolu.lu@linux.intel.com> <20240325021705.249769-8-baolu.lu@linux.intel.com> Content-Language: en-US From: Baolu Lu In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 3/28/24 3:50 PM, Tian, Kevin wrote: >> From: Lu Baolu >> Sent: Monday, March 25, 2024 10:17 AM >> >> Use cache_tag_flush_range() in switch_to_super_page() to invalidate the >> necessary caches when switching mappings from normal to super pages. The >> iommu_flush_iotlb_psi() call in intel_iommu_memory_notifier() is >> unnecessary since there should be no cache invalidation for the identity >> domain. >> > > what about a software identity domain? Software identity domain is used to fake the hardware passthrough capability, on early VT-d hardware which doesn't implement the passthrough mode. It's not any kind of protection domain, hence the OS is not required to manage the cache synchronization. Although I hope we can remove it someday and force the DMA domain instead, we still need to carry it nowadays. However, we need to make it consistent with the hardware passthrough. That is, hardware passthrough doesn't require any cache invalidation in memory hot-plug paths, the software passthrough should not either. Best regards, baolu