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Message-ID: <3f1fa4837819099bb91f83ace0cc6473e131d4a9.camel@microchip.com>
Subject: Re: [RFT PATCH v2 10/10] arm64: dts: microchip: sparx5_pcb135: drop
 duplicated NOR flash
From: Steen Hegelund <steen.hegelund@microchip.com>
To: Krzysztof Kozlowski <krzk@kernel.org>, Conor Dooley <conor@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>, Claudiu Beznea
	<claudiu.beznea@tuxon.dev>, Rob Herring <robh@kernel.org>, "Krzysztof
 Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, Lars Povlsen
	<lars.povlsen@microchip.com>, Daniel Machon <daniel.machon@microchip.com>,
	<UNGLinuxDriver@microchip.com>, Bjarni Jonasson
	<bjarni.jonasson@microchip.com>, "David S. Miller" <davem@davemloft.net>,
	<linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
CC: <horatiu.vultur@microchip.com>
Date: Mon, 8 Apr 2024 10:45:12 +0200
In-Reply-To: <20240405190419.74162-10-krzk@kernel.org>
References: <20240405190419.74162-1-krzk@kernel.org>
	 <20240405190419.74162-10-krzk@kernel.org>
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Hi Krzysztof,

On Fri, 2024-04-05 at 21:04 +0200, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>=20
> Since beginning the DTS extended the SPI0 in two places adding two
> SPI
> muxes, each with same SPI NOR flash.=C2=A0 Both used exactly the same
> chip-selects, so this was clearly buggy code.=C2=A0 Then in commit
> d0f482bb06f9 ("arm64: dts: sparx5: Add the Sparx5 switch node") one
> SPI
> mux was removed, while keeping the SPI NOR flash node.
>=20
> This still leaves duplicated SPI nodes under same chip select 0,
> reported by dtc W=3D1 warnings:
>=20
> =C2=A0 sparx5_pcb135_board.dtsi:92.10-96.4: Warning
> (unique_unit_address_if_enabled):
> /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also
> used in node /axi@600000000/spi@600104000/spi@0)
>=20
> Steen Hegelund confirmed that in fact there is a SPI mux, thus remove
> the duplicated node without the mux.
>=20
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>=20
> ---
>=20
> Not tested on hardware
>=20
> Changes in v2:
> 1. Remove SPI node without mux.
> ---
> =C2=A0arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi | 9 --------=
-
> =C2=A01 file changed, 9 deletions(-)
>=20
> diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
> b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
> index 20016efb3656..af2f1831f07f 100644
> --- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
> +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
> @@ -87,15 +87,6 @@ i2cmux_s32: i2cmux-3-pins {
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 };
> =C2=A0};
>=20
> -&spi0 {
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 status =3D "okay";
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 flash@0 {
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 compatible =3D "jedec,spi-nor";
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 spi-max-frequency =3D <8000000>;
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 reg =3D <0>;
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 };
> -};
> -
> =C2=A0&spi0 {
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 status =3D "okay";
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 spi@0 {
> --
> 2.34.1
>=20

This also works fine on my setup now.
Thanks for the patch series.

For this patch:
Tested-by: Steen Hegelund <Steen.Hegelund@microchip.com>


BR
Steen