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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 66a2fcdb-f3ca-47fd-98cd-08dc586583c1 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Apr 2024 07:20:20.4820 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Kh2ogDEsxRJSyp+pO0yYjK8FkN2lxHPZbpVFgKWcyl5f7rIkDH+nbzvn6KwmCo34Snl11Ak4PUCNQ8uOfLFkxg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR11MB6608 X-OriginatorOrg: intel.com > From: Lu Baolu > Sent: Sunday, April 7, 2024 10:43 PM >=20 > iommu_flush_iotlb_psi() is called in map and unmap paths. The caching > mode check before device TLB invalidation will cause device TLB > invalidation always issued if IOMMU is not running in the caching mode. > This is inefficient and causes performance overhead. s/inefficient/wrong/ 'inefficient' means that it's a right thing to do but just inefficient comp= ared to other options. But here by definition it's not required and caching mode is irrelevant in the context of devtlb. >=20 > Make device TLB invalidation behavior consistent between batched mode > unmapping and strict mode unmapping. Device TLB invalidation should only I don't quite understand the connection to batch vs. strict. > be requested in the unmap path if the IOMMU is not in caching mode. I'll remove the part about caching mode as it's irrelevant. >=20 > Fixes: bf92df30df90 ("intel-iommu: Only avoid flushing device IOTLB for > domain ID 0 in caching mode") > Signed-off-by: Lu Baolu > --- > drivers/iommu/intel/iommu.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) >=20 > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index 50eb9aed47cc..493b6a600394 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -1501,11 +1501,7 @@ static void iommu_flush_iotlb_psi(struct > intel_iommu *iommu, > else > __iommu_flush_iotlb_psi(iommu, did, pfn, pages, ih); >=20 > - /* > - * In caching mode, changes of pages from non-present to present > require > - * flush. However, device IOTLB doesn't need to be flushed in this > case. > - */ > - if (!cap_caching_mode(iommu->cap) || !map) > + if (!cap_caching_mode(iommu->cap) && !map) > iommu_flush_dev_iotlb(domain, addr, mask); It's a bit strange to do this half-baked way and then rely on next patch to do the right thing. It temporarily removes all devtlb invalidations for caching mode here and then add them back for unmap in next patch. caching mode has nothing to do with devtlb. So I'd just do: if (!map) iommu_flush_dev_iotlb(domain, addr, mask);