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09 Apr 2024 16:41:50 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Peter Colberg Subject: [RFC PATCH v2 1/9] fpga: dfl: alias dfl_feature_dev_data to dfl_feature_platform_data Date: Tue, 9 Apr 2024 19:39:34 -0400 Message-ID: <20240409233942.828440-2-peter.colberg@intel.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240409233942.828440-1-peter.colberg@intel.com> References: <20240409233942.828440-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add temporary macros that alias dfl_feature_dev_data ("fdata") to dfl_feature_platform_data ("pdata") and associated functions from the "fdata" to the corresponding "pdata" variants. This is done to split a single monolithic change into multiple, smaller patches at the request of the maintainer. The macros will be removed in the last patch of the series. Signed-off-by: Peter Colberg --- v2: - Split monolithic patch into series at request of maintainer --- drivers/fpga/dfl.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 5063d73b0d82..d724614796cb 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -206,6 +206,8 @@ #define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */ #define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */ +#define dfl_feature_dev_data dfl_feature_platform_data + /** * struct dfl_fpga_port_ops - port ops * @@ -365,6 +367,8 @@ int dfl_feature_dev_use_count(struct dfl_feature_platform_data *pdata) return pdata->open_count; } +#define dfl_fpga_fdata_set_private dfl_fpga_pdata_set_private + static inline void dfl_fpga_pdata_set_private(struct dfl_feature_platform_data *pdata, void *private) @@ -372,6 +376,8 @@ void dfl_fpga_pdata_set_private(struct dfl_feature_platform_data *pdata, pdata->private = private; } +#define dfl_fpga_fdata_get_private dfl_fpga_pdata_get_private + static inline void *dfl_fpga_pdata_get_private(struct dfl_feature_platform_data *pdata) { @@ -437,6 +443,10 @@ void __iomem *dfl_get_feature_ioaddr_by_id(struct device *dev, u16 id) return NULL; } +#define to_dfl_feature_dev_data dev_get_platdata + +#define dfl_fpga_fdata_to_parent dfl_fpga_pdata_to_parent + static inline struct device *dfl_fpga_pdata_to_parent(struct dfl_feature_platform_data *pdata) { -- 2.44.0