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Date: Wed, 10 Apr 2024 18:30:13 +0800
From: Jisheng Zhang <jszhang@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Samuel Holland <samuel.holland@sifive.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/3] clocksource/drivers/timer-clint: Add option to
 use CSR instead of mtime
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References: <20240406112159.1634-1-jszhang@kernel.org>
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On Tue, Apr 09, 2024 at 10:48:33PM +0800, Jisheng Zhang wrote:
> On Tue, Apr 09, 2024 at 03:26:18PM +0100, Conor Dooley wrote:
> > On Sat, Apr 06, 2024 at 07:21:58PM +0800, Jisheng Zhang wrote:
> > > As pointed out by commit ca7810aecdba ("lib: utils/timer: mtimer: add a
> > > quirk for lacking mtime register") of opensbi:
> > > 
> > > "T-Head developers surely have a different understanding of time CSR and
> > > CLINT's mtime register with SiFive ones, that they did not implement
> > > the mtime register at all -- as shown in openC906 source code, their
> > > time CSR value is just exposed at the top of their processor IP block
> > > and expects an external continous counter, which makes it not
> > > overrideable, and thus mtime register is not implemented, even not for
> > > reading. However, if CLINTEE is not enabled in T-Head's MXSTATUS
> > > extended CSR, these systems still rely on the mtimecmp registers to
> > > generate timer interrupts. This makes it necessary to implement T-Head
> > > C9xx CLINT support in OpenSBI MTIMER driver, which skips implementing
> > > reading mtime register and falls back to default code that reads time
> > > CSR."
> > > 
> > > To use the clint in RISCV-M NOMMU env on Milkv Duo little core, we
> > > need to fall back to read time CSR instead of mtime register. Add the
> > > option for this purpose.
> > > 
> > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > 
> > > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> > > index 34faa0320ece..7bbdbf2f96a8 100644
> > > --- a/drivers/clocksource/Kconfig
> > > +++ b/drivers/clocksource/Kconfig
> > > @@ -650,6 +650,15 @@ config CLINT_TIMER
> > >  	  This option enables the CLINT timer for RISC-V systems.  The CLINT
> > >  	  driver is usually used for NoMMU RISC-V systems.
> > >  
> > > +config CLINT_USE_CSR_INSTEADOF_MTIME
> > > +	bool "Use TIME CSR instead of the mtime register"
> > > +	depends on CLINT_TIMER
> > > +	help
> > > +	  Use TIME CSR instead of mtime register. Enable this option if
> > > +	  prefer TIME CSR over MTIME register, or if the implementation
> > > +	  doesn't implement the mtime register in CLINT, so fall back on
> > > +	  TIME CSR.
> > 
> > This, as a Kconfig option, seems a bit strange to me. We know at runtime
> > if we are on a T-Head device without the mtime register and should be
> > able decide to use the CSR implementation dynamically in that case,
> > right?
> 
> Dynamically decision can be done in clocksource/clockevnt:
> I can patch clint_clocksource.read to point to different clint_rdtime()
> implementation.
> 
> But clint timer is also used in NOMMU RISCV-M's get_cycles(), this
> can't be dynamically chosen w/o an ugly "if (is_c900)"
> check, and I'm not sure whether this check in get_cycles() will
> introduce non-trival overhead or not. Or use code patching technology
> here?

Hi,

After some tests, I think will go with code patching path, I.E use
static_branch in get_cycles(). New version is under cooking.

Thanks
> 
> Or introduce a function pointer such as unsigned long (*rdtime)(void)
> for RISCV_M_MODE, then point it to different implementation?
> 
> Any suggestion is welcome.
> Thanks