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Message-ID: <432000a6-1de9-4452-beb7-6954677e34c8@rock-chips.com>
Date: Wed, 10 Apr 2024 14:30:16 +0800
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Cc: shawn.lin@rock-chips.com, robh@kernel.org,
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 sfr@canb.auug.org.au, devicetree@vger.kernel.org,
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Subject: Re: [PATCH] arm64: dts: rockchip: remove startup-delay-us from
 vcc3v3_pcie2x1l0 on rock-5b
Content-Language: en-GB
To: Jianfeng Liu <liujianfeng1994@gmail.com>
References: <20240401081302.942742-1-liujianfeng1994@gmail.com>
From: Shawn Lin <shawn.lin@rock-chips.com>
In-Reply-To: <20240401081302.942742-1-liujianfeng1994@gmail.com>
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Hi Jianfeng,

On 2024/4/1 16:13, Jianfeng Liu wrote:
> Property startup-delay-us is copied from vendor dts and it will
> make kernel not detect pcie wifi device. If I run command:
> "echo 1 > /sys/bus/pci/rescan", pcie wifi device is detected, but
> my wifi device RTL8822CE failed to load driver. Another device
> RTL8723BE can load driver but no wifi signal is detected.
> 
> Removing this property will fix issues above.
> 
> Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>

startup-delay-us just make sure the power rail is stable before
any action is taken to start the link, preventing the device from
unable to work stably. So it shouldn't be the root cause I think.

Could you help try this patch to checkout if it works for you?

diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c 
b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
index d684214..df30127 100644
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -167,7 +167,7 @@ static int rockchip_pcie_start_link(struct dw_pcie *pci)
         struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);

         /* Reset device */
-       gpiod_set_value_cansleep(rockchip->rst_gpio, 0);
+       //gpiod_set_value_cansleep(rockchip->rst_gpio, 0);

         rockchip_pcie_enable_ltssm(rockchip);

@@ -180,7 +180,7 @@ static int rockchip_pcie_start_link(struct dw_pcie *pci)
          * We need more extra time as before, rather than setting just
          * 100us as we don't know how long should the device need to reset.
          */
-       msleep(100);
+       msleep(300);
         gpiod_set_value_cansleep(rockchip->rst_gpio, 1);

         return 0;
@@ -311,6 +311,8 @@ static int rockchip_pcie_probe(struct 
platform_device *pdev)
         if (ret)
                 return ret;

+       gpiod_set_value_cansleep(rockchip->rst_gpio, 0);
+
         /* DON'T MOVE ME: must be enable before PHY init */
         rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3");


> ---
>   arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> index d6bf2ee07..a9af654a0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> @@ -76,7 +76,6 @@ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
>   		regulator-boot-on;
>   		regulator-min-microvolt = <3300000>;
>   		regulator-max-microvolt = <3300000>;
> -		startup-delay-us = <50000>;
>   		vin-supply = <&vcc5v0_sys>;
>   	};
> 
> --
> 2.34.1
> 
> 
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