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From: Samuel Holland <samuel.holland@sifive.com>
To: Conor Dooley <conor@kernel.org>,
	linux-riscv@lists.infradead.org
Cc: Samuel Holland <samuel.holland@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 4/4] cache: sifive_ccache: Add EDAC and PMU as auxiliary devices
Date: Wed, 10 Apr 2024 16:22:06 -0700
Message-ID: <20240410232211.438277-5-samuel.holland@sifive.com>
In-Reply-To: <20240410232211.438277-1-samuel.holland@sifive.com>
References: <20240410232211.438277-1-samuel.holland@sifive.com>
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This allows the child drivers to access the Composable Cache device's
MMIO space and ties them to the lifecycle of the main platform device.

Currently, the EDAC driver is probed regardless of whether a Composable
Cache device actually exists on the system. Once converted to use the
auxiliary device bus, it will only be probed when needed.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
---

 drivers/cache/Kconfig              |  1 +
 drivers/cache/sifive_ccache.c      | 42 ++++++++++++++++++++++++++++++
 include/soc/sifive/sifive_ccache.h |  4 +++
 3 files changed, 47 insertions(+)

diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
index 9345ce4976d7..08e0415eba80 100644
--- a/drivers/cache/Kconfig
+++ b/drivers/cache/Kconfig
@@ -11,6 +11,7 @@ config AX45MP_L2_CACHE
 config SIFIVE_CCACHE
 	bool "Sifive Composable Cache controller"
 	depends on ARCH_SIFIVE || ARCH_STARFIVE
+	select AUXILIARY_BUS
 	help
 	  Support for the composable cache controller on SiFive platforms.
 
diff --git a/drivers/cache/sifive_ccache.c b/drivers/cache/sifive_ccache.c
index 42dac39c41cf..c7aa6f360967 100644
--- a/drivers/cache/sifive_ccache.c
+++ b/drivers/cache/sifive_ccache.c
@@ -9,6 +9,7 @@
 #define pr_fmt(fmt) "CCACHE: " fmt
 
 #include <linux/align.h>
+#include <linux/auxiliary_bus.h>
 #include <linux/debugfs.h>
 #include <linux/interrupt.h>
 #include <linux/of_irq.h>
@@ -249,6 +250,39 @@ static irqreturn_t ccache_int_handler(int irq, void *device)
 	return IRQ_HANDLED;
 }
 
+static void sifive_ccache_del_aux_dev(void *adev)
+{
+	auxiliary_device_delete(adev);
+	auxiliary_device_uninit(adev);
+}
+
+static int sifive_ccache_add_aux_dev(struct device *dev, struct auxiliary_device *adev,
+				     const char *name)
+{
+	int rc;
+
+	adev->dev.parent = dev;
+	adev->name = name;
+
+	rc = auxiliary_device_init(adev);
+	if (rc)
+		return rc;
+
+	rc = auxiliary_device_add(adev);
+	if (rc)
+		goto err_uninit;
+
+	rc = devm_add_action_or_reset(dev, sifive_ccache_del_aux_dev, adev);
+	if (rc)
+		return rc;
+
+	return 0;
+
+err_uninit:
+	auxiliary_device_uninit(adev);
+	return rc;
+}
+
 static int sifive_ccache_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -274,6 +308,14 @@ static int sifive_ccache_probe(struct platform_device *pdev)
 			return dev_err_probe(dev, rc, "Could not request IRQ %d\n", g_irq[i]);
 	}
 
+	rc = sifive_ccache_add_aux_dev(dev, &ccache.edac_dev, "edac");
+	if (rc)
+		return rc;
+
+	rc = sifive_ccache_add_aux_dev(dev, &ccache.pmu_dev, "pmu");
+	if (rc)
+		return rc;
+
 	return 0;
 }
 
diff --git a/include/soc/sifive/sifive_ccache.h b/include/soc/sifive/sifive_ccache.h
index 85fd1ff1355a..034dc8b6e4e4 100644
--- a/include/soc/sifive/sifive_ccache.h
+++ b/include/soc/sifive/sifive_ccache.h
@@ -7,8 +7,12 @@
 #ifndef __SOC_SIFIVE_CCACHE_H
 #define __SOC_SIFIVE_CCACHE_H
 
+#include <linux/auxiliary_bus.h>
+
 struct sifive_ccache {
 	void __iomem		*base;
+	struct auxiliary_device	edac_dev;
+	struct auxiliary_device	pmu_dev;
 };
 
 extern int register_sifive_ccache_error_notifier(struct notifier_block *nb);
-- 
2.44.0