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Thu, 11 Apr 2024 03:30:44 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Thu, 11 Apr 2024 03:30:41 -0700 Date: Thu, 11 Apr 2024 11:29:51 +0100 From: Conor Dooley To: Stephen Boyd CC: Sia Jee Heng , , , , , , , , , , , , , , , , , Subject: Re: [RFC v3 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Message-ID: <20240411-euphemism-ended-706f23d4a5ca@wendy> References: <20240110133128.286657-1-jeeheng.sia@starfivetech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="lisQmnqROX183EFJ" Content-Disposition: inline In-Reply-To: --lisQmnqROX183EFJ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Apr 11, 2024 at 12:40:09AM -0700, Stephen Boyd wrote: > Quoting Sia Jee Heng (2024-01-10 05:31:12) > > This patch series enabled basic clock & reset support for StarFive > > JH8100 SoC. > >=20 > > This patch series depends on the Initial device tree support for > > StarFive JH8100 SoC patch series which can be found at [1]. > >=20 > > As it is recommended to refrain from merging fundamental patches like > > Device Tree, Clock & Reset, and PINCTRL tested on FPGA/Emulator, into t= he > > RISC-V Mainline, this patch series has been renamed to "RFC" patches. Y= et, > > thanks to the reviewers who have reviewed the patches at [2]. The chang= es > > are captured below. >=20 > I don't think that's what should be happening. Instead, clk patches > should be sent to clk maintainers, reset patches to reset maintainers, > pinctrl patches to pinctrl maintainers, etc. The DTS can be sent later > when it's no longer an FPGA/Emulator? Right now I'm ignoring this series > because it's tagged as an RFC. Since this comes back to something I said, what I didn't want to happen was a bunch of pinctrl/clock/reset dt-binding headers that getting merged (and therefore exported to other projects) and then have those change later on when the chip was taped out. I don't really care if the drivers themselves get merged. If the JH8100 is being taped out soon (or already has been internally) and there's unlikely to be any changes, there's not really a reason to block the binding headers any more. --lisQmnqROX183EFJ Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZhe7ngAKCRB4tDGHoIJi 0oN8AQDJCMKWJWymNQyrXdSAIbIQWmLkJXGtohqPQ27J6cA5rQD9FaZ3m59i+b/i qcLnFDJe8daHP7ulI/YtwBRLJ+WBHAs= =Bkv+ -----END PGP SIGNATURE----- --lisQmnqROX183EFJ--