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AJvYcCXdWqTSiaC76g97H46WMbuu3Vt0To4apq6EInvjpYTdZ19HbT+u7r8ZvJs/ODN3MT2GYZXjcfDP2bEZeIKyGzsI5GvNpIZ41DIc7a/s X-Gm-Message-State: AOJu0YwXekZbL5ykKdNKrrTUzi2A3nR57uoo2N4z9u9LVw4VSoV2jGGp HSqDxH8ylE0IDPmadSpmmq+bCpEoD9D2MyZkl8pJ/4rmwiPc22ravSHYEIyE9k0Cpld84lmmLaj Y+Q== X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:100b:b0:dcc:f01f:65e1 with SMTP id w11-20020a056902100b00b00dccf01f65e1mr183523ybt.8.1712869044460; Thu, 11 Apr 2024 13:57:24 -0700 (PDT) Date: Thu, 11 Apr 2024 13:57:22 -0700 In-Reply-To: <20240126085444.324918-13-xiong.y.zhang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240126085444.324918-1-xiong.y.zhang@linux.intel.com> <20240126085444.324918-13-xiong.y.zhang@linux.intel.com> Message-ID: Subject: Re: [RFC PATCH 12/41] KVM: x86/pmu: Plumb through passthrough PMU to vcpu for Intel CPUs From: Sean Christopherson To: Xiong Zhang Cc: pbonzini@redhat.com, peterz@infradead.org, mizhang@google.com, kan.liang@intel.com, zhenyuw@linux.intel.com, dapeng1.mi@linux.intel.com, jmattson@google.com, kvm@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, zhiyuan.lv@intel.com, eranian@google.com, irogers@google.com, samantha.alt@intel.com, like.xu.linux@gmail.com, chao.gao@intel.com, Xiong Zhang Content-Type: text/plain; charset="us-ascii" On Fri, Jan 26, 2024, Xiong Zhang wrote: > From: Mingwei Zhang > > Plumb through passthrough PMU setting from kvm->arch into kvm_pmu on each > vcpu created. Note that enabling PMU is decided by VMM when it sets the > CPUID bits exposed to guest VM. So plumb through the enabling for each pmu > in intel_pmu_refresh(). As stated in the previous patch, even the most naive implementation can be: static inline bool is_passthrough_pmu_enabled(struct kvm_vcpu *vcpu) { return enable_passthrough_pmu && vcpu_to_pmu(vcpu)->version; }