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Fri, 12 Apr 2024 03:28:18 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Fri, 12 Apr 2024 03:28:14 -0700 Date: Fri, 12 Apr 2024 11:27:23 +0100 From: Conor Dooley To: Charlie Jenkins CC: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Evan Green , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , Jonathan Corbet , Shuah Khan , , , , Palmer Dabbelt , , , , Subject: Re: [PATCH 03/19] dt-bindings: riscv: Add xtheadvector ISA extension description Message-ID: <20240412-ream-dwarf-8cdc3d0f279c@wendy> References: <20240411-dev-charlie-support_thead_vector_6_9-v1-0-4af9815ec746@rivosinc.com> <20240411-dev-charlie-support_thead_vector_6_9-v1-3-4af9815ec746@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="qHjL7kIT1sLLfOfO" Content-Disposition: inline In-Reply-To: <20240411-dev-charlie-support_thead_vector_6_9-v1-3-4af9815ec746@rivosinc.com> --qHjL7kIT1sLLfOfO Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Apr 11, 2024 at 09:11:09PM -0700, Charlie Jenkins wrote: > The xtheadvector ISA extension is described on the T-Head extension spec > Github page [1]. >=20 > [1] https://github.com/T-head-Semi/thead-extension-spec/blob/master/xthea= dvector.adoc Link: [1] >=20 > Signed-off-by: Charlie Jenkins > --- > Documentation/devicetree/bindings/riscv/extensions.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Do= cumentation/devicetree/bindings/riscv/extensions.yaml > index 468c646247aa..3fd9dcf70662 100644 > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > @@ -477,6 +477,10 @@ properties: > latency, as ratified in commit 56ed795 ("Update > riscv-crypto-spec-vector.adoc") of riscv-crypto. > =20 > + # vendor extensions, each extension sorted alphanumerically unde= r the > + # vendor they belong to. Vendors are sorted alphanumerically as = well. > + > + # Andes > - const: xandespmu > description: > The Andes Technology performance monitor extension for count= er overflow > @@ -484,5 +488,10 @@ properties: > Registers in the AX45MP datasheet. > https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-= 5.0.0-Datasheet.pdf > =20 > + # T-HEAD > + - const: xtheadvector > + description: > + The T-HEAD specific 0.7.1 vector implementation. This needs the link and a SHA or some other reference to the version of the document. Thanks, Conor. > + > additionalProperties: true > ... >=20 > --=20 > 2.44.0 >=20 --qHjL7kIT1sLLfOfO Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZhkMiwAKCRB4tDGHoIJi 0jwIAQDE34qo4fc159LqDVXLnUh1xD3mFK2kVSZZanvcn5G3rAEA7T4mAnRBt/8y DaAR+UAhIFMAcbXd35hewh6U4mwHMwk= =Co3F -----END PGP SIGNATURE----- --qHjL7kIT1sLLfOfO--