Received-SPF: pass (google.com: domain of linux-kernel+bounces-142517-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161;
Date: Fri, 12 Apr 2024 11:40:38 +0100
From: Conor Dooley <conor.dooley@microchip.com>
To: Charlie Jenkins <charlie@rivosinc.com>
CC: Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof
 Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley
	<paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou
	<aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>, Conor Dooley
	<conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec
	<jernej.skrabec@gmail.com>, Samuel Holland <samuel@sholland.org>, Evan Green
	<evan@rivosinc.com>, =?iso-8859-1?Q?Cl=E9ment_L=E9ger?=
	<cleger@rivosinc.com>, Jonathan Corbet <corbet@lwn.net>, Shuah Khan
	<shuah@kernel.org>, <linux-riscv@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Palmer Dabbelt
	<palmer@rivosinc.com>, <linux-arm-kernel@lists.infradead.org>,
	<linux-sunxi@lists.linux.dev>, <linux-doc@vger.kernel.org>,
	<linux-kselftest@vger.kernel.org>
Subject: Re: [PATCH 07/19] riscv: Optimize
 riscv_cpu_isa_extension_(un)likely()
Message-ID: <20240412-aerosol-heritage-cec1eca172fb@wendy>
References: <20240411-dev-charlie-support_thead_vector_6_9-v1-0-4af9815ec746@rivosinc.com>
 <20240411-dev-charlie-support_thead_vector_6_9-v1-7-4af9815ec746@rivosinc.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
	protocol="application/pgp-signature"; boundary="YUt35LWoARaS+0kq"
Content-Disposition: inline
In-Reply-To: <20240411-dev-charlie-support_thead_vector_6_9-v1-7-4af9815ec746@rivosinc.com>

--YUt35LWoARaS+0kq
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Thu, Apr 11, 2024 at 09:11:13PM -0700, Charlie Jenkins wrote:
> When alternatives are disabled, riscv_cpu_isa_extension_(un)likely()
> checks if the current cpu supports the selected extension if not all
> cpus support the extension. It is sufficient to only check if the
> current cpu supports the extension.
>=20
> The alternatives code to handle if all cpus support an extension is
> factored out into a new function to support this.
>=20
> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> ---

>  static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, co=
nst unsigned long ext)
>  {
> -	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && riscv_has_extension_unlikel=
y(ext))
> -		return true;
> +	compiletime_assert(ext < RISCV_ISA_EXT_MAX,
> +			   "ext must be < RISCV_ISA_EXT_MAX");
> =20
> -	return __riscv_isa_extension_available(hart_isa[cpu].isa, ext);
> +	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && __riscv_has_extension_unlik=
ely_alternatives(ext))
> +		return true;
> +	else
> +		return __riscv_isa_extension_available(hart_isa[cpu].isa, ext);
>  }

static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const u=
nsigned long ext)
{
	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && riscv_has_extension_likely(ext=
))
		return true;

	return __riscv_isa_extension_available(hart_isa[cpu].isa, ext);
}

This is the code as things stand. If alternatives are disabled, the if
statement becomes if (0 && foo) which will lead to the function call
getting constant folded away and all you end up with is the call to
__riscv_isa_extension_available(). Unless I am missing something, I don't
think this patch has any affect?

Thanks,
Conor.


--YUt35LWoARaS+0kq
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZhkPpgAKCRB4tDGHoIJi
0gSNAQC+oMqT7zoEL9RxUhkl7uImpatcHajgjd6QJ8PnV2xTcgD/YMRe1XytJnd7
9pJBNiy2EcDN51fcQvf7s4vI9GM9Awc=
=Tq3D
-----END PGP SIGNATURE-----

--YUt35LWoARaS+0kq--