Received-SPF: pass (google.com: domain of linux-kernel+bounces-142670-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161;
From: Michael Riesch <michael.riesch@wolfvision.net>
Date: Fri, 12 Apr 2024 14:54:09 +0200
Subject: [PATCH] arm64: dts: rockchip: add wolfvision pf5 visualizer
 display
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
Message-Id: <20240412-feature-wolfvision-pf5-display-v1-1-f032f32dba1a@wolfvision.net>
To: Rob Herring <robh@kernel.org>, 
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, 
 Conor Dooley <conor+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, 
 linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, 
 Michael Riesch <michael.riesch@wolfvision.net>
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0:
	=?utf-8?B?RHdER0djaUtmdzNiNm83TGFqaTk0SnBNV1NVODdEMTBUTUswbUpOcW9TVHJ3?=
 =?utf-8?B?RnlRNzZBeXhZVEdOSGxwM1llWmYvaHlvc1lRWGswaERMQUdLSkNVUmFwb2xp?=
 =?utf-8?B?c1lyWEZsM3ppNDJybGt4QlNYV2EyYUFEK1o1RnlNKzJJUXF2VWgvSlhqOEpw?=
 =?utf-8?B?YStkelQ2aDZ0MllHQnovdEJ5bUdWRi9pOG1TVFIxUjgzVGtEZTRuQ29jRmR0?=
 =?utf-8?B?WWgrV0ZPa0pHMUxwcUM3SUFzRTRWNTBQWmIxVFRzdmtIS2tEZTdMUnlKTkxy?=
 =?utf-8?B?Y3VmU3lCNHdpaVdMWUtNZlJVL2tya0s4dlVuTjh1SGtyemZJc0ZWTytJejZJ?=
 =?utf-8?B?SWtiTXZaYjJNb09uMU5KN0hCWHlUN1pobHVlWFI0QjlnTnFpUTdMWE9NTVJV?=
 =?utf-8?B?bm1qS2VEOE1CU2h0U0NzYTlNYVJTTGRnR1RxUHVad2MwYm5nc2xOQWlnRDlN?=
 =?utf-8?B?VlNwMkRyZmlVRFJIZlYrOEs5Y2lsbkZ1Ni9aRHpXMHdORWpzdE1TSy92VDJh?=
 =?utf-8?B?UmNRbGpTOEtaT3Zua2FNUE9sRXpiaVE5S2VFS1FnRkZSWkdySUcwbVMwaElB?=
 =?utf-8?B?a2dTVWlwTGcxdEdhdm4zaHFmN2lPY3VqZnNEKys5MmFBTnRWOHlwM3owOElK?=
 =?utf-8?B?d3c2YWVzNzNMUHhmN0VFNk5LMlVVYmJidVd4KzNUV2J1Z21PS2ZVY3JpODR5?=
 =?utf-8?B?Zy96a0hVNUNrOERGY2FRY1g4U0FOeGdHdGsvSHBjaWRhUlNBL2NKc0JPR3Ft?=
 =?utf-8?B?V2YwQ1hGZXZvTlFEelNrczBiNHd2NjFvTC9kdUkrRFRId1ZCUFlaVEd4YVhY?=
 =?utf-8?B?cDNwUWUvbXdxd29td2JRRFl5ZURKTStPTlNVT2d0Q2NFTXVRUlRZS3dWbVox?=
 =?utf-8?B?QUhFSCtOOWpYdkhJWXBoZ3RTLzlxNXpoVHp6bCtoNldOcmpaeUIvR2RQVHVH?=
 =?utf-8?B?T3NzQk05ZVppRmJPUHNROXR2VlRrQ3VRNlpqSWxZV1ZPT0kxendOVlhzQkN0?=
 =?utf-8?B?b29sbFJOZ3AvQjQza1lXQjZiZzNGNGwydm9vUmpZa0JsblJqMklIZk5xdllp?=
 =?utf-8?B?RzdoTTd0ZmpOSGJPTnU3K2djU0tPcEF0ZG4xb0lJQ0NublZoTDRIMHBTbXpq?=
 =?utf-8?B?TDZFRXBVNFdabGJjek55aFUrdjlpdk9JQ3QybzFOc1BadjI2ZFMwVWFlNjhk?=
 =?utf-8?B?aGxLMTc2RG5PNkplT3R1L0pFWGFFREtOanVSaUtnWExLQ3RuUXBsVDNIRnBJ?=
 =?utf-8?B?eUN1UGJzbWRMZjlWVjV3bTJQUHd0RVdZSVViK0pQSHJxSmNNSWNnVm5EQVdn?=
 =?utf-8?B?UUN6eUtaM2RHc0ZUSUdacjRIN044ZVZObWhqdmFGODRNaWdMa0o1aDR0K2NR?=
 =?utf-8?B?N2htMHpRZXk0Yk5aeXljU1RmeERLS3dkdHZKaUZWdVgvMkJiSWRhZ1J3bmFj?=
 =?utf-8?B?WnRBWEM4b1o3T1h1ay94bEsrL1dKRUNObXRrSU9nS3d6WU45OEpzWGt0Tm1y?=
 =?utf-8?B?aUNBOHJhd20vSEl0WDQvSHAxWGF2UXJHRHJBVGxIRzNSL1lHV1poR1BNMThU?=
 =?utf-8?B?VU5UNFZkNnJucm0yTUQzbE5vRDZVdkpSakFUSFR0QWFHQU1VMmk2aWcyTjdl?=
 =?utf-8?B?THNDdThYRGFZZVg4QTZXbDdWVkFaZEo1NjlaUnovdUdMNFFDVnlvOHNHUWlx?=
 =?utf-8?B?SFBsalFWaHpBOGkrYy9PamVrV2xLNTVHYmc0WjNaZUdXamMycDlDTFVHL2pB?=
 =?utf-8?B?WWRqRUF0T2pYQ0phMXk4K2RmTkcxNFFyVUUxQVdLUmd3Mnd1blhyN290UXZu?=
 =?utf-8?B?UnllZ0k3ci9BSzVoU3hvWndxaUV2N1lrZitHR2FwSnRrNmt2Tnh4ZVNIeno3?=
 =?utf-8?B?TnEvR0FyMGs5Mm9GWnNCQ0JkMnljY2prVCtvb0dEQnJNc0tQd2R3aTY0cUNP?=
 =?utf-8?B?cG01MHJnaVhFVDdRb1JvUFFmV3lQS3RQcHVnTGF6MkkrLys0aUtRZlhacWZN?=
 =?utf-8?B?TmlmaldDUDhtZ2lITU9NNzI0Y05DY2dyTVJGVDhVakg2NWRTZ2xsMFlveWYv?=
 =?utf-8?B?L29QWG50c2pLdDlabTMvSHNYTkJqczAvaisyREQyekVtcU5OMUdOemxNYXBQ?=
 =?utf-8?B?N080NTdZQ09LTEZ6MnY2YUhiM3UzSjAra0RMVXAxUjA1Zzh0WnNaRzNOTHo4?=
 =?utf-8?B?Z1E9PQ==?=
X-OriginatorOrg: wolfvision.net
X-MS-Exchange-CrossTenant-Network-Message-Id: 481e4fa0-a4ba-4abf-e5d0-08dc5aefa897
X-MS-Exchange-CrossTenant-AuthSource: DU0PR08MB9155.eurprd08.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Apr 2024 12:54:15.2552
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: e94ec9da-9183-471e-83b3-51baa8eb804f
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: uR3hlbMSQuj1LybNyOHHS/N/GfDs6uDSLvq6OZfgiEy2WXJSsOrBpjczLkdmwaexYUZqi8cUfde7GAaB9A6oOUkNYNPlEACZDW4BMAyuhGk=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB9643

Add device tree overlay for the WolfVision PF5 Visualizer display.
Since there shall be additional variants of the WolfVision PF5 display in
future, move common definitions to a device tree include file.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
Habidere,

A further addition related to the WolfVision PF5 mainboard that
has been accepted recently.

Looking forward to your comments!
---
 arch/arm64/boot/dts/rockchip/Makefile              |   1 +
 .../rockchip/rk3568-wolfvision-pf5-display-vz.dtso |  17 +++
 .../rockchip/rk3568-wolfvision-pf5-display.dtsi    | 121 +++++++++++++++++++++
 3 files changed, 139 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 7da198be8787..3b2086134a94 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -110,6 +110,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display-vz.dtso b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display-vz.dtso
new file mode 100644
index 000000000000..70c23e1bf14b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display-vz.dtso
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for the WolfVision PF5 Visualizer display.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "rk3568-wolfvision-pf5-display.dtsi"
+
+&st7789 {
+	compatible = "jasonic,jt240mhqs-hwt-ek-e3",
+		     "sitronix,st7789v";
+	rotation = <270>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display.dtsi
new file mode 100644
index 000000000000..b22bb543ecbb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display.dtsi
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay base for the WolfVision PF5 displays.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rk3568-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+
+&{/} {
+	display_backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <0 255>;
+		default-brightness-level = <255>;
+		num-interpolated-steps = <255>;
+		power-supply = <&vcc3v3_sd>;
+		pwms = <&pwm10 0 1000000 0>;
+	};
+
+	display_spi: spi {
+		compatible = "spi-gpio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cs-gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
+		miso-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
+		mosi-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
+		num-chipselects = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcd_spi>;
+		sck-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
+
+		st7789: panel@0 {
+			compatible = "sitronix,st7789v";
+			reg = <0>;
+			assigned-clocks = <&cru PLL_VPLL>;
+			assigned-clock-rates = <700000000>;
+			backlight = <&display_backlight>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&lcdc_clock &lcdc_data18 &lcd_rstn>;
+			power-supply = <&vcc3v3_sw>;
+			reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>;
+			spi-max-frequency = <100000>;
+
+			port {
+				panel_in_vp2: endpoint {
+					remote-endpoint = <&vp2_out_rgb>;
+				};
+			};
+		};
+	};
+};
+
+&i2c1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	st1624: touchscreen@55 {
+		compatible = "sitronix,st1624", "sitronix,st1633";
+		reg = <0x55>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
+		gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&touch_int &touch_rstn>;
+		wakeup-source;
+	};
+};
+
+&pinctrl {
+	display: display-pinctrl {
+		lcd_rstn: lcd-rstn-pinctrl {
+			rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		lcd_spi: lcd-spi-pinctrl {
+			rockchip,pins =
+				/* lcd_sdo */
+				<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* lcd_csn */
+				<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* lcd_scl */
+				<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* lcd_sdi */
+				<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	touchscreen: touchscreen-pinctrl {
+		touch_int: touch-int-pinctrl {
+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		touch_rstn: touch-rstn-pinctrl {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm10 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm10m1_pins>;
+	status = "okay";
+};
+
+&vp2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	vp2_out_rgb: endpoint@ROCKCHIP_VOP2_EP_RGB0 {
+		reg = <ROCKCHIP_VOP2_EP_RGB0>;
+		remote-endpoint = <&panel_in_vp2>;
+	};
+};

---
base-commit: 56f939cce5e13f57a5fbdc75b451dc10a3b4f0c3
change-id: 20240412-feature-wolfvision-pf5-display-7134d441f68d

Best regards,
-- 
Michael Riesch <michael.riesch@wolfvision.net>