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Fri, 12 Apr 2024 15:13:01 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id /uJHLn1PGWaWAQAAD6G6ig (envelope-from ); Fri, 12 Apr 2024 15:13:01 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra Subject: [PATCH v2 0/4] x86: correctly handle NX and RW bit testing Date: Fri, 12 Apr 2024 17:12:54 +0200 Message-Id: <20240412151258.9171-1-jgross@suse.com> X-Mailer: git-send-email 2.35.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Flag: NO X-Spam-Score: -1.65 X-Rspamd-Action: no action X-Rspamd-Queue-Id: 73927383EA X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-1.65 / 50.00]; BAYES_HAM(-1.64)[92.69%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_SEVEN(0.00)[10]; FUZZY_BLOCKED(0.00)[rspamd.com]; RCVD_VIA_SMTP_AUTH(0.00)[]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_TLS_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns,suse.com:dkim]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.com:+] When the processor is detecting a set NX bit on any page table level when doing a page table walk, the resulting page will not be suitable for code execution. A similar approach is taken for the RW bit: all page table levels need to have the RW bit set in order to result in a writable page. Unfortunately the kernel is only looking at the leaf page table entry for deciding whether e.g. a writable page is executable or not. Fix that by calculating the effective NX and RW bits over all page table levels when doing a software address lookup, mimicking the hardware behavior. Changes in V2: - split the patch into multiple patches Juergen Gross (4): x86/pat: introduce lookup_address_in_pgd_attr() x86/mm: use lookup_address_in_pgd_attr() in show_fault_oops() x86/pat: restructure _lookup_address_cpa() x86/pat: fix W^X violation false-positives when running as Xen PV guest arch/x86/include/asm/pgtable_types.h | 2 + arch/x86/mm/fault.c | 7 +-- arch/x86/mm/pat/set_memory.c | 68 ++++++++++++++++++++++------ 3 files changed, 60 insertions(+), 17 deletions(-) -- 2.35.3