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Peter Anvin" , Borislav Petkov , Ingo Molnar , "Luse, Paul E" , "Williams, Dan J" , Jens Axboe , "Raj, Ashok" , "maz@kernel.org" , "seanjc@google.com" , Robin Murphy , "jim.harris@samsung.com" , "a.manzanares@samsung.com" , Bjorn Helgaas , "Zeng, Guang" , "robert.hoo.linux@gmail.com" , jacob.jun.pan@linux.intel.com Subject: Re: [PATCH v2 06/13] x86/irq: Set up per host CPU posted interrupt descriptors Message-ID: <20240412105439.37aa12cc@jacob-builder> In-Reply-To: References: <20240405223110.1609888-1-jacob.jun.pan@linux.intel.com> <20240405223110.1609888-7-jacob.jun.pan@linux.intel.com> Organization: OTC X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Hi Kevin, On Fri, 12 Apr 2024 09:16:25 +0000, "Tian, Kevin" wrote: > > From: Jacob Pan > > Sent: Saturday, April 6, 2024 6:31 AM > > > > +#ifdef CONFIG_X86_POSTED_MSI > > + > > +/* Posted Interrupt Descriptors for coalesced MSIs to be posted */ > > +DEFINE_PER_CPU_ALIGNED(struct pi_desc, posted_interrupt_desc); > > 'posted_msi_desc' to be more accurate? makes sense, will do. Thanks, Jacob