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[2003:c9:3f06:ef00:707f:f2f9:2cf:da41]) by smtp.gmail.com with ESMTPSA id z17-20020a05600c0a1100b00416b8da335esm8914249wmp.48.2024.04.13.06.05.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 13 Apr 2024 06:05:31 -0700 (PDT) Date: Sat, 13 Apr 2024 15:05:30 +0200 (CEST) From: Sebastian Ott To: Marc Zyngier cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: Re: [PATCH 2/4] KVM: arm64: maintain per VM value for CTR_EL0 In-Reply-To: <86frvpshno.wl-maz@kernel.org> Message-ID: <7e9c8367-6e9e-e36b-934e-170c90522134@redhat.com> References: <20240405120108.11844-1-sebott@redhat.com> <20240405120108.11844-3-sebott@redhat.com> <86frvpshno.wl-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed On Sat, 13 Apr 2024, Marc Zyngier wrote: > On Fri, 05 Apr 2024 13:01:06 +0100, > Sebastian Ott wrote: >> >> In preparation for CTR_EL0 emulation maintain a per VM for this >> register and use it where appropriate. >> >> Signed-off-by: Sebastian Ott >> --- >> arch/arm64/include/asm/kvm_host.h | 1 + >> arch/arm64/kvm/sys_regs.c | 22 +++++++++++++++------- >> 2 files changed, 16 insertions(+), 7 deletions(-) >> >> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h >> index 9e8a496fb284..481216febb46 100644 >> --- a/arch/arm64/include/asm/kvm_host.h >> +++ b/arch/arm64/include/asm/kvm_host.h >> @@ -318,6 +318,7 @@ struct kvm_arch { >> >> /* PMCR_EL0.N value for the guest */ >> u8 pmcr_n; >> + u64 ctr_el0; >> >> /* Iterator for idreg debugfs */ >> u8 idreg_debugfs_iter; > > Please consider the alignment of the fields. This leaves a 7 byte hole > that could be avoided (yes, I'm on a mission to reduce the size of the > various structures, because they are absolute pigs). OK. >> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c >> index 131f5b0ca2b9..4d29b1a0842d 100644 >> --- a/arch/arm64/kvm/sys_regs.c >> +++ b/arch/arm64/kvm/sys_regs.c >> @@ -215,13 +215,21 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg) >> /* CSSELR values; used to index KVM_REG_ARM_DEMUX_ID_CCSIDR */ >> #define CSSELR_MAX 14 >> >> +static u64 kvm_get_ctr_el0(struct kvm *kvm) >> +{ >> + if (kvm->arch.ctr_el0) >> + return kvm->arch.ctr_el0; > > Is this relying on some bits not being 0? > >> + >> + return read_sanitised_ftr_reg(SYS_CTR_EL0); > > Why isn't the shadow value always populated? The idea was for kvm->arch.ctr_el0 being non zero only if userspace set it up to differ from the host value. So it can be used to decide if we need to set up a trap for the reg access (without comparing it to the host value again). Thanks, Sebastian