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Date: Sat, 13 Apr 2024 19:10:33 +0200
From: Fabio Aiuto <fabio.aiuto@engicam.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Mark Brown <broonie@kernel.org>, Liam Girdwood <lgirdwood@gmail.com>,
	Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
	Robin Gong <yibin.gong@nxp.com>, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Matteo Lisi <matteo.lisi@engicam.com>,
	Mirko Ardinghi <mirko.ardinghi@engicam.com>
Subject: Re: [PATCH v3 1/2] regulator: dt-bindings: pca9450: add PMIC_RST_B
 warm reset property
Message-ID: <Zhq8ibYrZH05/AQt@engicam>
References: <20240411165801.143160-1-fabio.aiuto@engicam.com>
 <20240411165801.143160-2-fabio.aiuto@engicam.com>
 <e86812b3-a3aa-4bdb-9b32-a0339f0f76b5@kernel.org>
 <ZhjhCvVNezy9r7P4@engicam>
 <bd1e6507-dee4-4dcf-bbd3-50539270cd63@kernel.org>
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In-Reply-To: <bd1e6507-dee4-4dcf-bbd3-50539270cd63@kernel.org>

Dear Krzysztof,

Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto:
> On 12/04/2024 09:21, Fabio Aiuto wrote:
> > Dear Krzysztof,
> > 
> > Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
> >> On 11/04/2024 18:58, Fabio Aiuto wrote:
> >>> Add property to trigger warm reset on PMIC_RST_B assertion
> >>>
> >>
> >> That's rather vague and does not tell me much why this is supposed to be
> >> board level configuration. It sounds more like a debugging feature:
> >> during development you want to retain memory contents for pstore etc.
> >> Then I could imagine this should be turned runtime, e.g. via
> >> sysfs/debugfs, because for example you want to start inspecting a
> >> customer's device.
> > 
> > thanks, I spent too few time writing this commit log and I apologize
> > for that. I was thinking about something like:
> > 
> >     The default configuration of the PMIC behavior makes the PMIC
> >     power cycle most regulators on PMIC_RST_B assertion. This power
> >     cycling causes the memory contents of OCRAM to be lost.
> >     Some systems needs some memory that survives reset and
> >     reboot, therefore add a property to tell PMIC_RST_B is
> >     wired.
> > 
> > The actual configuration is made at probe time, anyway we need
> > to override the default behavior of the pmic to get a warm reset
> > everytime the PMIC_RST_B pin is asserted and this property tells
> > us that "something is wired to that pin" and "it has to behave
> > that way on pin assertion". Our use cases do not meet the need
> > of further runtime configuration change.
> 
> What is the use case?

I just have an external power button connected to that pin, it works
either with warm reset and cold-reset-except-ldo12. Moreover the default behavior
is cold reset and not reset-disabled. Anyway I thought it was useful for other
people to add a property selecting behavior for that pin too as was done for
WDOG_B. That's why I mainly duplicated the logic. If there is a pin adding a
reset source it's a good point to provide a way to access the register bits
related to this signal.

> 
> Sorry, you did not bring any further argument why this is board
> specific. And please don't explain how probing works, but address the
> problem here: why type of reset is specific to board design. To me it is
> OS policy.
> 

Why reset type is specific to board design? I'm sorry but I don't know
what you mean, as said my intention was to enlarge the number of configurable
bits in pca9450 register space hoping this would be useful for someone.

All I can say is that is specific to board design for the same reason the
wdog_b- reset type was specific to board design.

Thank you for your time,

fabio

> Best regards,
> Krzysztof
>