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From: Vamsi Krishna Attunuru <vattunuru@marvell.com>
To: Arnd Bergmann <arnd@arndb.de>,
        Greg Kroah-Hartman
	<gregkh@linuxfoundation.org>
CC: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Jerin Jacob
	<jerinj@marvell.com>
Subject: RE: [EXTERNAL] Re: [PATCH v5 1/1] misc: mrvl-cn10k-dpi: add Octeon
 CN10K DPI administrative driver
Thread-Topic: [EXTERNAL] Re: [PATCH v5 1/1] misc: mrvl-cn10k-dpi: add Octeon
 CN10K DPI administrative driver
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Date: Sun, 14 Apr 2024 09:33:37 +0000
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> -----Original Message-----
> From: Arnd Bergmann <arnd@arndb.de>
> Sent: Sunday, April 14, 2024 12:41 AM
> To: Vamsi Krishna Attunuru <vattunuru@marvell.com>; Greg Kroah-Hartman
> <gregkh@linuxfoundation.org>
> Cc: linux-kernel@vger.kernel.org; Jerin Jacob <jerinj@marvell.com>
> Subject: Re: [EXTERNAL] Re: [PATCH v5 1/1] misc: mrvl-cn10k-dpi: add
> Octeon CN10K DPI administrative driver
>=20
> On Sat, Apr 13, 2024, at 18:17, Vamsi Krishna Attunuru wrote:
> > From: Greg KH <gregkh@linuxfoundation.org>
> >> On Sat, Apr 13, 2024 at 10:58:37AM +0000, Vamsi Krishna Attunuru wrote=
:
> >> > From: Greg KH <gregkh@linuxfoundation.org>
> >> >
> >> > No, it's a normal PCIe sriov capability implemented in all sriov
> >> > capable PCIe
> >> devices.
> >> > Our PF device aka this driver in kernel space service mailbox
> >> > requests from userspace applications via VF devices. For instance,
> >> > DPI VF device from user space writes into mailbox registers and the
> >> > DPI hardware
> >> triggers an interrupt to DPI PF device.
> >> > Upon PF interrupt, this driver services the mailbox requests.
> >>
> >> Isn't that a "normal" PCI thing?  How is this different from other
> >> devices that have VF?
> >
> > Looks like there is a lot of confusion for this device. Let me explain
> > There are two aspects for this DPI PF device.
> > a) It's a PCIe device so it is "using" some of the PCI services
> > provided PCIe HW or PCI subsystem
> > b) It is "providing" non PCIe service(DPI HW administrative function)
> > by using (a) Let me enumerate PF device operations with above aspects.
> > 1) Means to create VF(s) from PF. It's category (a) service and driver
> > uses API (pci_sriov_configure_simple()) from PCI subsystem to
> > implement it.
> > 2) Means to get the interrupt(mailbox or any device specific
> > interrupt). It's category (a) service and driver uses API
> > (pci_alloc_irq_vectors()) from PCI subsystem to implement it.
> > 3) Means to get the mailbox content from VF by using (2). It's
> > category
> > (b) service. This service is not part of PCI specification.
> > DPI PF device has the mailbox registers(DPI_MBOX_PF_VF_DATA
> registers)
> > in its PCIe BAR space which are device specific.
> > 4) Upon receiving DPI HW administrative function mailbox request,
> > service it. Its category (b) service. This service is not part of PCI
> > specification.
> > For instance, dpi_queue_open & close are requests sent from DPI VF
> > device to DPI PF device for setting up the DPI VF queue resources.
> > Once its setup by DPI PF, then DPI VF device can use these queues.
> > These queues are not part of PCIe specification. These queues are used
> > for making DMA by DPI VF device/driver.
>=20
> It's not directly my area either, but as far as I can tell from reading t=
he
> competing sr-iov based device drivers, these seem to handle all of the ab=
ove
> in the network driver that owns the PF rather than a separate driver, e.g=
 for
> the first point:
>=20
> $ git grep -w sriov_configure.=3D drivers/net/
> drivers/net/ethernet/amazon/ena/ena_netdev.c:   .sriov_configure =3D
> pci_sriov_configure_simple,
> drivers/net/ethernet/amd/pds_core/main.c:       .sriov_configure =3D
> pdsc_sriov_configure,
> drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c:       .sriov_configure =
=3D
> bnx2x_sriov_configure,
> drivers/net/ethernet/broadcom/bnxt/bnxt.c:      .sriov_configure =3D
> bnxt_sriov_configure,
> drivers/net/ethernet/cavium/liquidio/lio_main.c:        .sriov_configure =
=3D
> liquidio_enable_sriov,
> drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c:        .sriov_configure =
=3D
> cxgb4_iov_configure,
> drivers/net/ethernet/emulex/benet/be_main.c:    .sriov_configure =3D
> be_pci_sriov_configure,
> drivers/net/ethernet/freescale/enetc/enetc_pf.c:        .sriov_configure =
=3D
> enetc_sriov_configure,
> drivers/net/ethernet/fungible/funeth/funeth_main.c:     .sriov_configure =
=3D
> funeth_sriov_configure,
> drivers/net/ethernet/hisilicon/hns3/hns3_enet.c:        .sriov_configure =
=3D
> hns3_pci_sriov_configure,
> drivers/net/ethernet/huawei/hinic/hinic_main.c: .sriov_configure =3D
> hinic_pci_sriov_configure,
> drivers/net/ethernet/intel/fm10k/fm10k_pci.c:   .sriov_configure        =
=3D
> fm10k_iov_configure,
> drivers/net/ethernet/intel/i40e/i40e_main.c:    .sriov_configure =3D
> i40e_pci_sriov_configure,
> drivers/net/ethernet/intel/ice/ice_main.c:      .sriov_configure =3D
> ice_sriov_configure,
> drivers/net/ethernet/intel/idpf/idpf_main.c:    .sriov_configure        =
=3D
> idpf_sriov_configure,
> drivers/net/ethernet/intel/igb/igb_main.c:      .sriov_configure =3D
> igb_pci_sriov_configure,
> drivers/net/ethernet/intel/ixgbe/ixgbe_main.c:  .sriov_configure =3D
> ixgbe_pci_sriov_configure,
> drivers/net/ethernet/marvell/octeon_ep/octep_main.c:    .sriov_configure =
=3D
> octep_sriov_configure,
> drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c:   .sriov_configure =
=3D
> otx2_sriov_configure
> drivers/net/ethernet/netronome/nfp/nfp_main.c:  .sriov_configure        =
=3D
> nfp_pcie_sriov_configure,
> drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c:    .sriov_configure =
=3D
> ionic_sriov_configure,
> drivers/net/ethernet/qlogic/qede/qede_main.c:   .sriov_configure =3D
> qede_sriov_configure,
> drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c:       .sriov_configure =
=3D
> qlcnic_pci_sriov_configure,
> drivers/net/ethernet/sfc/ef10.c:        .sriov_configure =3D
> efx_ef10_sriov_configure,
> drivers/net/ethernet/sfc/ef100.c:       .sriov_configure =3D
> ef100_pci_sriov_configure,
> drivers/net/ethernet/sfc/ef100_nic.c:   .sriov_configure =3D
> IS_ENABLED(CONFIG_SFC_SRIOV) ?
> drivers/net/ethernet/sfc/efx.c: .sriov_configure =3D efx_pci_sriov_config=
ure,
> drivers/net/ethernet/sfc/siena/efx.c:   .sriov_configure =3D
> efx_pci_sriov_configure,
> drivers/net/ethernet/sfc/siena/siena.c: .sriov_configure =3D
> efx_siena_sriov_configure,
>=20
> In what way is your hardware different from all the others?

All of above devices are network devices which implements struct net_device=
_ops.
i.e Those PCI devices are networking devices which are capable of sending/r=
eceiving network packets.
This device doesn't have networking functionality to implement struct net_d=
evice_ops, It's a simple PCIe PF
device enables it's VFs and services any mailbox requests.

 Couple of misc pcie drivers that enable its VFs are

UPSTREAM/linux# grep -nr "sriov_configure" drivers/misc/
drivers/misc/genwqe/card_base.c:1327:static int genwqe_sriov_configure(stru=
ct pci_dev *dev, int numvfs)
drivers/misc/genwqe/card_base.c:1358:   .sriov_configure =3D genwqe_sriov_c=
onfigure,
drivers/misc/pci_endpoint_test.c:1011:  .sriov_configure =3D pci_sriov_conf=
igure_simple,

>=20
>      Arnd